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Wed, 09 Feb 2022 15:15:22 -0800 (PST) Received: from ripper ([2600:1700:a0:3dc8:205:1bff:fec0:b9b3]) by smtp.gmail.com with ESMTPSA id c29sm7147074otk.16.2022.02.09.15.15.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 09 Feb 2022 15:15:21 -0800 (PST) Date: Wed, 9 Feb 2022 15:17:38 -0800 From: Bjorn Andersson To: Ansuel Smith Cc: Andy Gross , Rob Herring , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH 1/2] dt-bindings: soc: qcom: add qcom,tcsr bindings Message-ID: References: <20220122001609.15904-1-ansuelsmth@gmail.com> <20220122001609.15904-2-ansuelsmth@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On Tue 01 Feb 13:49 PST 2022, Ansuel Smith wrote: > On Mon, Jan 31, 2022 at 05:41:30PM -0600, Bjorn Andersson wrote: > > On Fri 21 Jan 18:16 CST 2022, Ansuel Smith wrote: > > > > > Add qcom,tcsr-ipq8064 and qcom,tcsr-ipq4019 Documentation for the > > > tcsr present in ipq8064 and ipa4019 required to configure and > > > set various peripherals present in the SoC. > > > > > > Signed-off-by: Ansuel Smith > > > --- > > > .../bindings/soc/qcom/qcom,tcsr-ipq4019.yaml | 93 +++++++++++++++++++ > > > .../bindings/soc/qcom/qcom,tcsr-ipq8064.yaml | 47 ++++++++++ > > > 2 files changed, 140 insertions(+) > > > create mode 100644 Documentation/devicetree/bindings/soc/qcom/qcom,tcsr-ipq4019.yaml > > > create mode 100644 Documentation/devicetree/bindings/soc/qcom/qcom,tcsr-ipq8064.yaml > > > > > > diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,tcsr-ipq4019.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,tcsr-ipq4019.yaml > > > new file mode 100644 > > > index 000000000000..3a82ccbb6588 > > > --- /dev/null > > > +++ b/Documentation/devicetree/bindings/soc/qcom/qcom,tcsr-ipq4019.yaml > > > @@ -0,0 +1,93 @@ > > > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) > > > +%YAML 1.2 > > > +--- > > > +$id: "http://devicetree.org/schemas/soc/qcom/qcom,tcsr-ipq4019.yaml#" > > > +$schema: "http://devicetree.org/meta-schemas/core.yaml#" > > > + > > > +title: Qualcomm Top Control and Status Registers binding for IPQ4019 > > > + > > > +maintainers: > > > + - Ansuel Smith > > > + > > > +description: | > > > + This binding describes the Qualcomm Top Control and Status Registers, used > > > + for accessing configuration and mux settings for a variety of peripherals > > > + for ipq4019. > > > + > > > +properties: > > > + compatible: > > > + items: > > > + - const: qcom,tcsr-ipq4019 > > > + - const: syscon > > > + > > > + reg: > > > + maxItems: 1 > > > + > > > + qcom,usb-hsphy-mode-select: > > > + description: Select usb hsphy mode for ipq4019 > > > > Why isn't this driven by the USB node, where I presume you otherwise > > need to duplicate this decision? > > > > From what I understand this is global, setting this will apply on any > usb present. > > > Is this platform not capable of OTG? > > > > I assume it's capable by selecting the correct mode using tcsr. > I expect that the USB controller will receive extcon (or usb_role_switch) requests to flip between the modes based on something. When this happens it sounds like the USB controller would have to propagate that change to the TCSR bits as well, and if the USB controller driver is able to flip the bits then this shouldn't be needed here? Regards, Bjorn