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From: Sudeep Holla <sudeep.holla@arm.com>
To: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Cc: rafael@kernel.org, viresh.kumar@linaro.org, robh+dt@kernel.org,
	Sudeep Holla <sudeep.holla@arm.com>,
	krzk+dt@kernel.org, bjorn.andersson@linaro.org,
	linux-pm@vger.kernel.org, devicetree@vger.kernel.org,
	linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org,
	angelogioacchino.delregno@somainline.org,
	Hector Yuan <hector.yuan@mediatek.com>
Subject: Re: [PATCH v2 1/2] dt-bindings: dvfs: Use MediaTek CPUFREQ HW as an example
Date: Wed, 9 Mar 2022 19:17:20 +0000	[thread overview]
Message-ID: <Yij9QBWFe5z9Ze23@bogus> (raw)
In-Reply-To: <20220309151541.139511-2-manivannan.sadhasivam@linaro.org>

On Wed, Mar 09, 2022 at 08:45:40PM +0530, Manivannan Sadhasivam wrote:
> Qcom CPUFREQ HW don't have the support for generic performance domains yet.
> So use MediaTek CPUFREQ HW that has the support available in mainline.
> 
> This also silences the below dtschema warnings for "cpufreq-qcom-hw.yaml":
> 
> Documentation/devicetree/bindings/dvfs/performance-domain.example.dt.yaml: performance-controller@12340000: reg: [[305397760, 4096]] is too short
>         From schema: Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yaml
> Documentation/devicetree/bindings/dvfs/performance-domain.example.dt.yaml: performance-controller@12340000: 'clocks' is a required property
>         From schema: Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yaml
> Documentation/devicetree/bindings/dvfs/performance-domain.example.dt.yaml: performance-controller@12340000: 'clock-names' is a required property
>         From schema: Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yaml
> Documentation/devicetree/bindings/dvfs/performance-domain.example.dt.yaml: performance-controller@12340000: '#freq-domain-cells' is a required property
>         From schema: Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yaml
> Documentation/devicetree/bindings/dvfs/performance-domain.example.dt.yaml: performance-controller@12340000: '#performance-domain-cells' does not match any of the regexes: 'pinctrl-[0-9]+'
>         From schema: Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yaml
> 
> Cc: Hector Yuan <hector.yuan@mediatek.com>
> Cc: Sudeep Holla <sudeep.holla@arm.com>

Thanks for fixing this. It seem to have slipped through the cracks. I had
plans to push this once Mediatek driver was merged but totally forgot about
it.

Acked-by: Sudeep Holla <sudeep.holla@arm.com>

-- 
Regards,
Sudeep

  reply	other threads:[~2022-03-09 19:18 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-03-09 15:15 [PATCH v2 0/2] Convert Qcom CPUFREQ HW binding to YAML Manivannan Sadhasivam
2022-03-09 15:15 ` [PATCH v2 1/2] dt-bindings: dvfs: Use MediaTek CPUFREQ HW as an example Manivannan Sadhasivam
2022-03-09 19:17   ` Sudeep Holla [this message]
2022-03-10 23:13   ` Rob Herring
2022-07-13 14:42   ` Sudeep Holla
2022-03-09 15:15 ` [PATCH v2 2/2] dt-bindings: cpufreq: cpufreq-qcom-hw: Convert to YAML bindings Manivannan Sadhasivam
2022-03-09 16:47   ` Krzysztof Kozlowski
2022-07-13  5:40   ` Viresh Kumar
2022-03-11  3:31 ` [PATCH v2 0/2] Convert Qcom CPUFREQ HW binding to YAML Viresh Kumar

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