From: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
To: Sakari Ailus <sakari.ailus@linux.intel.com>
Cc: linux-media@vger.kernel.org, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org,
linux-phy@lists.infradead.org, Yong Deng <yong.deng@magewell.com>,
Mauro Carvalho Chehab <mchehab@kernel.org>,
Rob Herring <robh+dt@kernel.org>, Chen-Yu Tsai <wens@csie.org>,
Jernej Skrabec <jernej.skrabec@gmail.com>,
Samuel Holland <samuel@sholland.org>,
Hans Verkuil <hans.verkuil@cisco.com>,
Laurent Pinchart <laurent.pinchart@ideasonboard.com>,
Kishon Vijay Abraham I <kishon@ti.com>,
Vinod Koul <vkoul@kernel.org>, Maxime Ripard <mripard@kernel.org>,
Thomas Petazzoni <thomas.petazzoni@bootlin.com>
Subject: Re: [PATCH v3 5/9] media: sunxi: Add support for the A31 MIPI CSI-2 controller
Date: Thu, 17 Mar 2022 17:25:29 +0100 [thread overview]
Message-ID: <YjNg+T+J1YkOm9LE@aptenodytes> (raw)
In-Reply-To: <YjHluwVnbPyHo1kp@paasikivi.fi.intel.com>
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Hi Sakari,
On Wed 16 Mar 22, 15:27, Sakari Ailus wrote:
> Hi Paul,
>
> Thanks for the set.
>
> On Wed, Mar 02, 2022 at 11:07:35PM +0100, Paul Kocialkowski wrote:
> ...
> > +static int sun6i_mipi_csi2_s_stream(struct v4l2_subdev *subdev, int on)
> > +{
> > + struct sun6i_mipi_csi2_device *csi2_dev = v4l2_get_subdevdata(subdev);
> > + struct v4l2_subdev *source_subdev = csi2_dev->bridge.source_subdev;
> > + union phy_configure_opts dphy_opts = { 0 };
> > + struct phy_configure_opts_mipi_dphy *dphy_cfg = &dphy_opts.mipi_dphy;
> > + struct v4l2_mbus_framefmt *mbus_format = &csi2_dev->bridge.mbus_format;
> > + const struct sun6i_mipi_csi2_format *format;
> > + struct phy *dphy = csi2_dev->dphy;
> > + struct device *dev = csi2_dev->dev;
> > + struct v4l2_ctrl *ctrl;
> > + unsigned int lanes_count =
> > + csi2_dev->bridge.endpoint.bus.mipi_csi2.num_data_lanes;
> > + unsigned long pixel_rate;
> > + /* Initialize to 0 to use both in disable label (ret != 0) and off. */
> > + int ret = 0;
> > +
> > + if (!source_subdev)
> > + return -ENODEV;
> > +
> > + if (!on) {
> > + v4l2_subdev_call(source_subdev, video, s_stream, 0);
> > + goto disable;
> > + }
> > +
> > + /* Runtime PM */
> > +
> > + ret = pm_runtime_resume_and_get(dev);
> > + if (ret < 0)
> > + return ret;
> > +
> > + /* Sensor Pixel Rate */
> > +
> > + ctrl = v4l2_ctrl_find(source_subdev->ctrl_handler, V4L2_CID_PIXEL_RATE);
> > + if (!ctrl) {
> > + dev_err(dev, "missing sensor pixel rate\n");
> > + ret = -ENODEV;
> > + goto error_pm;
> > + }
> > +
> > + pixel_rate = (unsigned long)v4l2_ctrl_g_ctrl_int64(ctrl);
> > + if (!pixel_rate) {
> > + dev_err(dev, "missing (zero) sensor pixel rate\n");
> > + ret = -ENODEV;
> > + goto error_pm;
> > + }
> > +
> > + /* D-PHY */
> > +
> > + if (!lanes_count) {
>
> I first thought this check could be moved to the beginning, but it's also
> redundant. v4l2_fwnode_endpoint_parse() will check the configuration is
> valid, i.e. the number of lanes is not zero.
Good to know, thanks!
> But should you add checks to make sure the hardware supports what has been
> configured? I'd do that right after parsing the endpoint.
I guess you mean checking that we don't get more than 4 lanes?
And maybe something related to lane ordering too?
> And you only seem to be using the number of data lanes, nothing more. So
> I'd store that, instead of the entire parsed v4l2_fwnode_endpoint.
That's correct, why not.
> The same applies to patch 8.
>
> I think these could be done on top of this set after it is merged. Up to
> you.
I'll go for another iteration.
Thanks!
Paul
> ...
>
> > +static int
> > +sun6i_mipi_csi2_bridge_source_setup(struct sun6i_mipi_csi2_device *csi2_dev)
> > +{
> > + struct v4l2_async_notifier *notifier = &csi2_dev->bridge.notifier;
> > + struct v4l2_fwnode_endpoint *endpoint = &csi2_dev->bridge.endpoint;
> > + struct v4l2_async_subdev *subdev_async;
> > + struct fwnode_handle *handle;
> > + struct device *dev = csi2_dev->dev;
> > + int ret;
> > +
> > + handle = fwnode_graph_get_endpoint_by_id(dev_fwnode(dev), 0, 0,
> > + FWNODE_GRAPH_ENDPOINT_NEXT);
> > + if (!handle)
> > + return -ENODEV;
> > +
> > + endpoint->bus_type = V4L2_MBUS_CSI2_DPHY;
> > +
> > + ret = v4l2_fwnode_endpoint_parse(handle, endpoint);
> > + if (ret)
> > + goto complete;
> > +
> > + subdev_async = v4l2_async_nf_add_fwnode_remote(notifier, handle,
> > + struct v4l2_async_subdev);
> > + if (IS_ERR(subdev_async))
> > + ret = PTR_ERR(subdev_async);
> > +
> > +complete:
> > + fwnode_handle_put(handle);
> > +
> > + return ret;
> > +}
>
> --
> Kind regards,
>
> Sakari Ailus
--
Paul Kocialkowski, Bootlin
Embedded Linux and kernel engineering
https://bootlin.com
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next prev parent reply other threads:[~2022-03-17 16:25 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-03-02 22:07 [PATCH v3 0/9] Allwinner A31/A83T MIPI CSI-2 and A31 ISP / MIPI CSI-2 Support Paul Kocialkowski
2022-03-02 22:07 ` [PATCH v3 1/9] dt-bindings: sun6i-a31-mipi-dphy: Add optional direction property Paul Kocialkowski
2022-03-07 23:28 ` Rob Herring
2022-03-02 22:07 ` [PATCH v3 2/9] phy: allwinner: phy-sun6i-mipi-dphy: Support D-PHY Rx mode for MIPI CSI-2 Paul Kocialkowski
2022-03-02 22:07 ` [PATCH v3 3/9] dt-bindings: media: sun6i-a31-csi: Add MIPI CSI-2 input port Paul Kocialkowski
2022-03-03 13:44 ` Rob Herring
2022-03-02 22:07 ` [PATCH v3 4/9] dt-bindings: media: Add Allwinner A31 MIPI CSI-2 bindings documentation Paul Kocialkowski
2022-03-02 22:07 ` [PATCH v3 5/9] media: sunxi: Add support for the A31 MIPI CSI-2 controller Paul Kocialkowski
2022-03-16 13:27 ` Sakari Ailus
2022-03-17 16:25 ` Paul Kocialkowski [this message]
2022-03-02 22:07 ` [PATCH v3 6/9] MAINTAINERS: Add entry for the Allwinner A31 MIPI CSI-2 bridge driver Paul Kocialkowski
2022-03-02 22:07 ` [PATCH v3 7/9] dt-bindings: media: Add Allwinner A83T MIPI CSI-2 bindings documentation Paul Kocialkowski
2022-03-16 13:26 ` Sakari Ailus
2022-03-17 16:21 ` Paul Kocialkowski
2022-03-02 22:07 ` [PATCH v3 8/9] media: sunxi: Add support for the A83T MIPI CSI-2 controller Paul Kocialkowski
2022-03-02 22:07 ` [PATCH v3 9/9] MAINTAINERS: Add entry for the Allwinner A83T MIPI CSI-2 bridge Paul Kocialkowski
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