[PATCH v1 1/4] arm64: dts: qcom: sc7280: Rename crd to crd-r3

[PATCH v1 1/4] arm64: dts: qcom: sc7280: Rename crd to crd-r3

[Matthias Kaehlcke]

There are multiple revisions of CRD boards. The current sc7280-crd.dts
describes revision 3 and 4 (aka CRD 1.0 and 2.0). Support for a newer
version will be added by another patch. Add the revision number to
distinguish it from the versionn. Also add the revision numbers to
the compatible string.

Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
---

 arch/arm64/boot/dts/qcom/Makefile                             | 2 +-
 .../arm64/boot/dts/qcom/{sc7280-crd.dts => sc7280-crd-r3.dts} | 4 ++--
 2 files changed, 3 insertions(+), 3 deletions(-)
 rename arch/arm64/boot/dts/qcom/{sc7280-crd.dts => sc7280-crd-r3.dts} (91%)

diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile
index f9e6343acd03..38d41b1d70ad 100644
--- a/arch/arm64/boot/dts/qcom/Makefile
+++ b/arch/arm64/boot/dts/qcom/Makefile
@@ -87,7 +87,7 @@ dtb-$(CONFIG_ARCH_QCOM)	+= sc7280-herobrine-herobrine-r0.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= sc7280-herobrine-herobrine-r1.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= sc7280-idp.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= sc7280-idp2.dtb
-dtb-$(CONFIG_ARCH_QCOM)	+= sc7280-crd.dtb
+dtb-$(CONFIG_ARCH_QCOM)	+= sc7280-crd-r3.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= sdm630-sony-xperia-ganges-kirin.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= sdm630-sony-xperia-nile-discovery.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= sdm630-sony-xperia-nile-pioneer.dtb
diff --git a/arch/arm64/boot/dts/qcom/sc7280-crd.dts b/arch/arm64/boot/dts/qcom/sc7280-crd-r3.dts
similarity index 91%
rename from arch/arm64/boot/dts/qcom/sc7280-crd.dts
rename to arch/arm64/boot/dts/qcom/sc7280-crd-r3.dts
index e2efbdde53a3..7a028b9248c3 100644
--- a/arch/arm64/boot/dts/qcom/sc7280-crd.dts
+++ b/arch/arm64/boot/dts/qcom/sc7280-crd-r3.dts
@@ -11,8 +11,8 @@
 #include "sc7280-idp-ec-h1.dtsi"
 
 / {
-	model = "Qualcomm Technologies, Inc. sc7280 CRD platform";
-	compatible = "qcom,sc7280-crd", "google,hoglin", "qcom,sc7280";
+	model = "Qualcomm Technologies, Inc. sc7280 CRD platform (rev3 - 4)";
+	compatible = "qcom,sc7280-crd", "google,hoglin-rev3", "google,hoglin-rev4", "qcom,sc7280";
 
 	aliases {
 		serial0 = &uart5;
-- 
2.35.1.723.g4982287a31-goog

[PATCH v1 2/4] arm64: dts: qcom: sc7280: Add 'piglin' to the crd-r3 compatible strings

[Matthias Kaehlcke]

With newer bootloader versions the crd-r3 (aka CRD 1.0 and 2.0) is
identified as a 'piglin' board (like the IDP2 board), instead of 'hoglin'
Add the compatible strings 'google,piglin-rev{3,4}'. The hoglin entries
are kept to make sure the board keeps booting with older bootloader
versions.

The compatible string 'google,piglin' (without revision information) is
still used by the IDP2 board, which is not expected to evolve further.

Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
---

 arch/arm64/boot/dts/qcom/sc7280-crd-r3.dts | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/qcom/sc7280-crd-r3.dts b/arch/arm64/boot/dts/qcom/sc7280-crd-r3.dts
index 7a028b9248c3..344338ad8a01 100644
--- a/arch/arm64/boot/dts/qcom/sc7280-crd-r3.dts
+++ b/arch/arm64/boot/dts/qcom/sc7280-crd-r3.dts
@@ -12,7 +12,10 @@
 
 / {
 	model = "Qualcomm Technologies, Inc. sc7280 CRD platform (rev3 - 4)";
-	compatible = "qcom,sc7280-crd", "google,hoglin-rev3", "google,hoglin-rev4", "qcom,sc7280";
+	compatible = "qcom,sc7280-crd",
+		     "google,hoglin-rev3", "google,hoglin-rev4",
+		     "google,piglin-rev3", "google,piglin-rev4",
+		     "qcom,sc7280";
 
 	aliases {
 		serial0 = &uart5;
-- 
2.35.1.723.g4982287a31-goog

Re: [PATCH v1 2/4] arm64: dts: qcom: sc7280: Add 'piglin' to the crd-r3 compatible strings

[Doug Anderson]

Hi,

On Wed, Mar 16, 2022 at 5:28 PM Matthias Kaehlcke <mka@chromium.org> wrote:
>
> With newer bootloader versions the crd-r3 (aka CRD 1.0 and 2.0) is
> identified as a 'piglin' board (like the IDP2 board), instead of 'hoglin'
> Add the compatible strings 'google,piglin-rev{3,4}'. The hoglin entries
> are kept to make sure the board keeps booting with older bootloader
> versions.
>
> The compatible string 'google,piglin' (without revision information) is
> still used by the IDP2 board, which is not expected to evolve further.
>
> Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
> ---
>
>  arch/arm64/boot/dts/qcom/sc7280-crd-r3.dts | 5 ++++-
>  1 file changed, 4 insertions(+), 1 deletion(-)

Reviewed-by: Douglas Anderson <dianders@chromium.org>

Re: [PATCH v1 2/4] arm64: dts: qcom: sc7280: Add 'piglin' to the crd-r3 compatible strings

[Stephen Boyd]

Quoting Matthias Kaehlcke (2022-03-16 17:28:18)
> With newer bootloader versions the crd-r3 (aka CRD 1.0 and 2.0) is
> identified as a 'piglin' board (like the IDP2 board), instead of 'hoglin'
> Add the compatible strings 'google,piglin-rev{3,4}'. The hoglin entries
> are kept to make sure the board keeps booting with older bootloader
> versions.
>
> The compatible string 'google,piglin' (without revision information) is
> still used by the IDP2 board, which is not expected to evolve further.
>
> Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
> ---

Reviewed-by: Stephen Boyd <swboyd@chromium.org>

Re: [PATCH v1 2/4] arm64: dts: qcom: sc7280: Add 'piglin' to the crd-r3 compatible strings

[Rajendra Nayak]

On 3/17/2022 5:58 AM, Matthias Kaehlcke wrote:
> With newer bootloader versions the crd-r3 (aka CRD 1.0 and 2.0) is
> identified as a 'piglin' board (like the IDP2 board), instead of 'hoglin'
> Add the compatible strings 'google,piglin-rev{3,4}'. The hoglin entries
> are kept to make sure the board keeps booting with older bootloader
> versions.

The older bootloaders really look for the google,hoglin-rev3/google,hoglin-rev4
compatibles or just google,hoglin? If its just google,hoglin, won;t it pick the
crd-rev5+ dtb now?

> 
> The compatible string 'google,piglin' (without revision information) is
> still used by the IDP2 board, which is not expected to evolve further.
> 
> Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
> ---
> 
>   arch/arm64/boot/dts/qcom/sc7280-crd-r3.dts | 5 ++++-
>   1 file changed, 4 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/arm64/boot/dts/qcom/sc7280-crd-r3.dts b/arch/arm64/boot/dts/qcom/sc7280-crd-r3.dts
> index 7a028b9248c3..344338ad8a01 100644
> --- a/arch/arm64/boot/dts/qcom/sc7280-crd-r3.dts
> +++ b/arch/arm64/boot/dts/qcom/sc7280-crd-r3.dts
> @@ -12,7 +12,10 @@
>   
>   / {
>   	model = "Qualcomm Technologies, Inc. sc7280 CRD platform (rev3 - 4)";
> -	compatible = "qcom,sc7280-crd", "google,hoglin-rev3", "google,hoglin-rev4", "qcom,sc7280";
> +	compatible = "qcom,sc7280-crd",
> +		     "google,hoglin-rev3", "google,hoglin-rev4",
> +		     "google,piglin-rev3", "google,piglin-rev4",
> +		     "qcom,sc7280";
>   
>   	aliases {
>   		serial0 = &uart5;

Re: [PATCH v1 2/4] arm64: dts: qcom: sc7280: Add 'piglin' to the crd-r3 compatible strings

[Matthias Kaehlcke]

On Mon, Mar 21, 2022 at 11:14:56AM +0530, Rajendra Nayak wrote:
> 
> On 3/17/2022 5:58 AM, Matthias Kaehlcke wrote:
> > With newer bootloader versions the crd-r3 (aka CRD 1.0 and 2.0) is
> > identified as a 'piglin' board (like the IDP2 board), instead of 'hoglin'
> > Add the compatible strings 'google,piglin-rev{3,4}'. The hoglin entries
> > are kept to make sure the board keeps booting with older bootloader
> > versions.
> 
> The older bootloaders really look for the google,hoglin-rev3/google,hoglin-rev4
> compatibles or just google,hoglin? If its just google,hoglin, won;t it pick the
> crd-rev5+ dtb now?

They look for the -revN compatible, I confirmed that on my CRD 2.0.

Re: [PATCH v1 2/4] arm64: dts: qcom: sc7280: Add 'piglin' to the crd-r3 compatible strings

[Doug Anderson]

"Hi,

On Mon, Mar 21, 2022 at 8:14 AM Matthias Kaehlcke <mka@chromium.org> wrote:
>
> On Mon, Mar 21, 2022 at 11:14:56AM +0530, Rajendra Nayak wrote:
> >
> > On 3/17/2022 5:58 AM, Matthias Kaehlcke wrote:
> > > With newer bootloader versions the crd-r3 (aka CRD 1.0 and 2.0) is
> > > identified as a 'piglin' board (like the IDP2 board), instead of 'hoglin'
> > > Add the compatible strings 'google,piglin-rev{3,4}'. The hoglin entries
> > > are kept to make sure the board keeps booting with older bootloader
> > > versions.
> >
> > The older bootloaders really look for the google,hoglin-rev3/google,hoglin-rev4
> > compatibles or just google,hoglin? If its just google,hoglin, won;t it pick the
> > crd-rev5+ dtb now?
>
> They look for the -revN compatible, I confirmed that on my CRD 2.0.

Thanks for confirming Matthias! I'll also note that, in general, these
"google,board-revX" type compatible strings are all programmatically
generated. You can see at:

https://chromium.googlesource.com/chromiumos/platform/depthcharge/+/refs/heads/main/src/boot/fit.c#70

...and whenever it's using this normal logic then it has a standard
fallback mechanism in place. On a random board in front of me
depthcharge prints out:

Compat preference: google,lazor-rev3-sku0 google,lazor-rev3
google,lazor-sku0 google,lazor

So it'll first try the very specific verison with rev and sku. Then
just by rev. Then just by sku. ...and if none of those match it'll
pick a device tree that has neither. The "newest" device tree always
has no revision number specified and that way if software doesn't
change but the revision bumps then we have no problem. We only add the
revision info for old boards.

There are a few cases where we add special compatible strings and
these don't match on board/rev. This is fairly uncommon, though. You
might be aware of the special case of adding "qcom,sc7180-idp"
(without rev/sku matching) for "bubs". See:

https://chromium.googlesource.com/chromiumos/platform/depthcharge/+/refs/heads/main/src/board/trogdor/board.c#136


-Doug

Re: [PATCH v1 2/4] arm64: dts: qcom: sc7280: Add 'piglin' to the crd-r3 compatible strings

[Rajendra Nayak]

On 3/21/2022 11:30 PM, Doug Anderson wrote:
> "Hi,
> 
> On Mon, Mar 21, 2022 at 8:14 AM Matthias Kaehlcke <mka@chromium.org> wrote:
>>
>> On Mon, Mar 21, 2022 at 11:14:56AM +0530, Rajendra Nayak wrote:
>>>
>>> On 3/17/2022 5:58 AM, Matthias Kaehlcke wrote:
>>>> With newer bootloader versions the crd-r3 (aka CRD 1.0 and 2.0) is
>>>> identified as a 'piglin' board (like the IDP2 board), instead of 'hoglin'
>>>> Add the compatible strings 'google,piglin-rev{3,4}'. The hoglin entries
>>>> are kept to make sure the board keeps booting with older bootloader
>>>> versions.
>>>
>>> The older bootloaders really look for the google,hoglin-rev3/google,hoglin-rev4
>>> compatibles or just google,hoglin? If its just google,hoglin, won;t it pick the
>>> crd-rev5+ dtb now?
>>
>> They look for the -revN compatible, I confirmed that on my CRD 2.0.
> 
> Thanks for confirming Matthias! I'll also note that, in general, these
> "google,board-revX" type compatible strings are all programmatically
> generated. You can see at:
> 
> https://chromium.googlesource.com/chromiumos/platform/depthcharge/+/refs/heads/main/src/boot/fit.c#70
> 
> ...and whenever it's using this normal logic then it has a standard
> fallback mechanism in place. On a random board in front of me
> depthcharge prints out:
> 
> Compat preference: google,lazor-rev3-sku0 google,lazor-rev3
> google,lazor-sku0 google,lazor
> 
> So it'll first try the very specific verison with rev and sku. Then
> just by rev. Then just by sku. ...and if none of those match it'll
> pick a device tree that has neither. The "newest" device tree always
> has no revision number specified and that way if software doesn't
> change but the revision bumps then we have no problem. We only add the
> revision info for old boards.

Thanks Matthias/Doug for the clarification,

Reviewed-by: Rajendra Nayak <quic_rjendra@quicinc.com>

> 
> There are a few cases where we add special compatible strings and
> these don't match on board/rev. This is fairly uncommon, though. You
> might be aware of the special case of adding "qcom,sc7180-idp"
> (without rev/sku matching) for "bubs". See:
> 
> https://chromium.googlesource.com/chromiumos/platform/depthcharge/+/refs/heads/main/src/board/trogdor/board.c#136
> 
> 
> -Doug

[PATCH v1 3/4] arm64: dts: qcom: sc7280: herobrine: disable some regulators by default

[Matthias Kaehlcke]

Not all herobrine boards have a world facing camera or a fingerprint
sensor, disable the regulators that feed these devices by default and
only enable them for the boards that use them.

Similarly the audio configuration can vary between boards, not all
boards have the regulator pp3300_codec, disable it by default.

Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
---

 .../qcom/sc7280-herobrine-herobrine-r1.dts    | 30 +++++++++++++++++++
 .../arm64/boot/dts/qcom/sc7280-herobrine.dtsi |  6 ++++
 2 files changed, 36 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/sc7280-herobrine-herobrine-r1.dts b/arch/arm64/boot/dts/qcom/sc7280-herobrine-herobrine-r1.dts
index f95273052da0..29c4ca095294 100644
--- a/arch/arm64/boot/dts/qcom/sc7280-herobrine-herobrine-r1.dts
+++ b/arch/arm64/boot/dts/qcom/sc7280-herobrine-herobrine-r1.dts
@@ -14,6 +14,36 @@ / {
 	compatible = "google,herobrine", "qcom,sc7280";
 };
 
+/*
+ * ADDITIONS TO FIXED REGULATORS DEFINED IN PARENT DEVICE TREE FILES
+ *
+ * Sort order matches the order in the parent files (parents before children).
+ */
+
+&pp3300_codec {
+	status = "okay";
+};
+
+&pp3300_fp_mcu {
+	status = "okay";
+};
+
+&pp2850_vcm_wf_cam {
+	status = "okay";
+};
+
+&pp2850_wf_cam {
+	status = "okay";
+};
+
+&pp1800_wf_cam {
+	status = "okay";
+};
+
+&pp1200_wf_cam {
+	status = "okay";
+};
+
 /* ADDITIONS TO NODES DEFINED IN PARENT DEVICE TREE FILES */
 
 &ap_spi_fp {
diff --git a/arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi b/arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi
index dc17f2079695..40cca69b1414 100644
--- a/arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi
@@ -92,6 +92,7 @@ pp3300_codec: pp3300-codec-regulator {
 		pinctrl-0 = <&en_pp3300_codec>;
 
 		vin-supply = <&pp3300_z1>;
+		status = "disabled";
 	};
 
 	pp3300_left_in_mlb: pp3300-left-in-mlb-regulator {
@@ -132,6 +133,7 @@ pp3300_fp_mcu: pp3300-fp-regulator {
 		pinctrl-0 = <&en_fp_rails>;
 
 		vin-supply = <&pp3300_z1>;
+		status = "disabled";
 	};
 
 	pp3300_hub: pp3300-hub-regulator {
@@ -194,6 +196,7 @@ pp2850_vcm_wf_cam: pp2850-vcm-wf-cam-regulator {
 		pinctrl-0 = <&wf_cam_en>;
 
 		vin-supply = <&pp3300_z1>;
+		status = "disabled";
 	};
 
 	pp2850_wf_cam: pp2850-wf-cam-regulator {
@@ -214,6 +217,7 @@ pp2850_wf_cam: pp2850-wf-cam-regulator {
 		 */
 
 		vin-supply = <&pp3300_z1>;
+		status = "disabled";
 	};
 
 	pp1800_fp: pp1800-fp-regulator {
@@ -258,6 +262,7 @@ pp1800_wf_cam: pp1800-wf-cam-regulator {
 		 */
 
 		vin-supply = <&vreg_l19b_s0>;
+		status = "disabled";
 	};
 
 	pp1200_wf_cam: pp1200-wf-cam-regulator {
@@ -278,6 +283,7 @@ pp1200_wf_cam: pp1200-wf-cam-regulator {
 		 */
 
 		vin-supply = <&pp3300_z1>;
+		status = "disabled";
 	};
 
 	/* BOARD-SPECIFIC TOP LEVEL NODES */
-- 
2.35.1.723.g4982287a31-goog

Re: [PATCH v1 3/4] arm64: dts: qcom: sc7280: herobrine: disable some regulators by default

[Doug Anderson]

Hi,

On Wed, Mar 16, 2022 at 5:28 PM Matthias Kaehlcke <mka@chromium.org> wrote:
>
> Not all herobrine boards have a world facing camera or a fingerprint
> sensor, disable the regulators that feed these devices by default and
> only enable them for the boards that use them.
>
> Similarly the audio configuration can vary between boards, not all
> boards have the regulator pp3300_codec, disable it by default.
>
> Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
> ---
>
>  .../qcom/sc7280-herobrine-herobrine-r1.dts    | 30 +++++++++++++++++++
>  .../arm64/boot/dts/qcom/sc7280-herobrine.dtsi |  6 ++++
>  2 files changed, 36 insertions(+)

Reviewed-by: Douglas Anderson <dianders@chromium.org>

Re: [PATCH v1 3/4] arm64: dts: qcom: sc7280: herobrine: disable some regulators by default

[Stephen Boyd]

Quoting Matthias Kaehlcke (2022-03-16 17:28:19)
> Not all herobrine boards have a world facing camera or a fingerprint
> sensor, disable the regulators that feed these devices by default and
> only enable them for the boards that use them.
>
> Similarly the audio configuration can vary between boards, not all
> boards have the regulator pp3300_codec, disable it by default.
>
> Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
> ---

This seems complicated. Maybe we should introduce some sort of mixin dts
file for fingerprint and world facing camera and audio type so that
boards can pick and choose what they want. Either way, that can come
later when we get there.

Reviewed-by: Stephen Boyd <swboyd@chromium.org>

Re: [PATCH v1 3/4] arm64: dts: qcom: sc7280: herobrine: disable some regulators by default

[Rajendra Nayak]

On 3/17/2022 5:58 AM, Matthias Kaehlcke wrote:
> Not all herobrine boards have a world facing camera or a fingerprint
> sensor, disable the regulators that feed these devices by default and
> only enable them for the boards that use them.
> 
> Similarly the audio configuration can vary between boards, not all
> boards have the regulator pp3300_codec, disable it by default.
> 
> Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
> ---

Reviewed-by: Rajendra Nayak <quic_rjendra@quicinc.com>

[PATCH v1 4/4] arm64: dts: qcom: sc7280: Add CRD rev5

[Matthias Kaehlcke]

Add support for Qualcomm's SC7280 CRD rev5 (aka CRD 3.0/3.1).

Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
---

 arch/arm64/boot/dts/qcom/Makefile             |   1 +
 .../boot/dts/qcom/sc7280-herobrine-crd.dts    | 313 ++++++++++++++++++
 2 files changed, 314 insertions(+)
 create mode 100644 arch/arm64/boot/dts/qcom/sc7280-herobrine-crd.dts

diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile
index 38d41b1d70ad..396a6a6a82d8 100644
--- a/arch/arm64/boot/dts/qcom/Makefile
+++ b/arch/arm64/boot/dts/qcom/Makefile
@@ -83,6 +83,7 @@ dtb-$(CONFIG_ARCH_QCOM)	+= sc7180-trogdor-pompom-r3.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= sc7180-trogdor-pompom-r3-lte.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= sc7180-trogdor-r1.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= sc7180-trogdor-r1-lte.dtb
+dtb-$(CONFIG_ARCH_QCOM)	+= sc7280-herobrine-crd.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= sc7280-herobrine-herobrine-r0.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= sc7280-herobrine-herobrine-r1.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= sc7280-idp.dtb
diff --git a/arch/arm64/boot/dts/qcom/sc7280-herobrine-crd.dts b/arch/arm64/boot/dts/qcom/sc7280-herobrine-crd.dts
new file mode 100644
index 000000000000..fd6eadc8581a
--- /dev/null
+++ b/arch/arm64/boot/dts/qcom/sc7280-herobrine-crd.dts
@@ -0,0 +1,313 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * sc7280 CRD 3+ board device tree source
+ *
+ * Copyright 2022 Google LLC.
+ */
+
+/dts-v1/;
+
+#include "sc7280-herobrine.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. sc7280 CRD platform (rev5+)";
+	compatible = "google,hoglin", "qcom,sc7280";
+};
+
+/* ADDITIONS TO NODES DEFINED IN PARENT DEVICE TREE FILES */
+
+&apps_rsc {
+	pmg1110-regulators {
+		compatible = "qcom,pmg1110-rpmh-regulators";
+		qcom,pmic-id = "k";
+
+		vreg_s1k_1p0: smps1 {
+			regulator-min-microvolt = <1010000>;
+			regulator-max-microvolt = <1170000>;
+		};
+	};
+};
+
+ap_tp_i2c: &i2c0 {
+	status = "okay";
+	clock-frequency = <400000>;
+
+	trackpad: trackpad@15 {
+		compatible = "hid-over-i2c";
+		reg = <0x15>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&tp_int_odl>;
+
+		interrupt-parent = <&tlmm>;
+		interrupts = <7 IRQ_TYPE_EDGE_FALLING>;
+
+		post-power-on-delay-ms = <20>;
+		hid-descr-addr = <0x0001>;
+		vdd-supply = <&pp3300_z1>;
+
+		wakeup-source;
+	};
+};
+
+ap_ts_pen_1v8: &i2c13 {
+	status = "okay";
+	clock-frequency = <400000>;
+
+	ap_ts: touchscreen@5c {
+		compatible = "hid-over-i2c";
+		reg = <0x5c>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&ts_int_conn>, <&ts_rst_conn>;
+
+		interrupt-parent = <&tlmm>;
+		interrupts = <55 IRQ_TYPE_LEVEL_LOW>;
+
+		post-power-on-delay-ms = <500>;
+		hid-descr-addr = <0x0000>;
+
+		vdd-supply = <&pp3300_left_in_mlb>;
+	};
+};
+
+/* For nvme */
+&pcie1 {
+	status = "okay";
+};
+
+/* For nvme */
+&pcie1_phy {
+	status = "okay";
+};
+
+/* For eMMC */
+&sdhc_1 {
+	status = "okay";
+};
+
+/* For SD Card */
+&sdhc_2 {
+	status = "okay";
+};
+
+/* PINCTRL - BOARD-SPECIFIC */
+
+/*
+ * Methodology for gpio-line-names:
+ * - If a pin goes to CRD board and is named it gets that name.
+ * - If a pin goes to CRD board and is not named, it gets no name.
+ * - If a pin is totally internal to Qcard then it gets Qcard name.
+ * - If a pin is not hooked up on Qcard, it gets no name.
+ */
+
+&pm8350c_gpios {
+	gpio-line-names = "FLASH_STROBE_1",		/* 1 */
+			  "AP_SUSPEND",
+			  "PM8008_1_RST_N",
+			  "",
+			  "",
+			  "EDP_BL_REG_EN",
+			  "PMIC_EDP_BL_EN",
+			  "PMIC_EDP_BL_PWM",
+			  "";
+};
+
+&tlmm {
+	gpio-line-names = "AP_TP_I2C_SDA",		/* 0 */
+			  "AP_TP_I2C_SCL",
+			  "PCIE1_RESET_N",
+			  "PCIE1_WAKE_N",
+			  "APPS_I2C_SDA",
+			  "APPS_I2C_SCL",
+			  "",
+			  "TPAD_INT_N",
+			  "",
+			  "",
+
+			  "GNSS_L1_EN",			/* 10 */
+			  "GNSS_L5_EN",
+			  "QSPI_DATA_0",
+			  "QSPI_DATA_1",
+			  "QSPI_CLK",
+			  "QSPI_CS_N_1",
+			  /*
+			   * AP_FLASH_WP is crossystem ABI. Schematics call it
+			   * BIOS_FLASH_WP_L (the '_L' suffix is misleading, the
+			   * signal is active high).
+			   */
+			  "AP_FLASH_WP",
+			  "",
+			  "AP_EC_INT_N",
+			  "",
+
+			  "CAM0_RST_N",			/* 20 */
+			  "CAM1_RST_N",
+			  "SM_DBG_UART_TX",
+			  "SM_DBG_UART_RX",
+			  "",
+			  "PM8008_IRQ_1",
+			  "HOST2WLAN_SOL",
+			  "WLAN2HOST_SOL",
+			  "MOS_BT_UART_CTS",
+			  "MOS_BT_UART_RFR",
+
+			  "MOS_BT_UART_TX",		/* 30 */
+			  "MOS_BT_UART_RX",
+			  "",
+			  "HUB_RST",
+			  "",
+			  "",
+			  "",
+			  "",
+			  "",
+			  "",
+
+			  "EC_SPI_MISO_GPIO40",		/* 40 */
+			  "EC_SPI_MOSI_GPIO41",
+			  "EC_SPI_CLK_GPIO42",
+			  "EC_SPI_CS_GPIO43",
+			  "",
+			  "EARLY_EUD_EN",
+			  "",
+			  "DP_HOT_PLUG_DETECT",
+			  "AP_BRD_ID_0",
+			  "AP_BRD_ID_1",
+
+			  "AP_BRD_ID_2",		/* 50 */
+			  "NVME_PWR_REG_EN",
+			  "TS_I2C_SDA_CONN",
+			  "TS_I2C_CLK_CONN",
+			  "TS_RST_CONN",
+			  "TS_INT_CONN",
+			  "AP_I2C_TPM_SDA",
+			  "AP_I2C_TPM_SCL",
+			  "",
+			  "",
+
+			  "EDP_HOT_PLUG_DET_N",		/* 60 */
+			  "",
+			  "",
+			  "AMP_EN",
+			  "CAM0_MCLK_GPIO_64",
+			  "CAM1_MCLK_GPIO_65",
+			  "",
+			  "",
+			  "",
+			  "CCI_I2C_SDA0",
+
+			  "CCI_I2C_SCL0",		/* 70 */
+			  "",
+			  "",
+			  "",
+			  "",
+			  "",
+			  "",
+			  "",
+			  "",
+			  "PCIE1_CLK_REQ_N",
+
+			  "EN_PP3300_DX_EDP",		/* 80 */
+			  "US_EURO_HS_SEL",
+			  "FORCED_USB_BOOT",
+			  "WCD_RESET_N",
+			  "MOS_WLAN_EN",
+			  "MOS_BT_EN",
+			  "MOS_SW_CTRL",
+			  "MOS_PCIE0_RST",
+			  "MOS_PCIE0_CLKREQ_N",
+			  "MOS_PCIE0_WAKE_N",
+
+			  "MOS_LAA_AS_EN",		/* 90 */
+			  "SD_CARD_DET_CONN",
+			  "",
+			  "",
+			  "MOS_BT_WLAN_SLIMBUS_CLK",
+			  "MOS_BT_WLAN_SLIMBUS_DAT0",
+			  "",
+			  "",
+			  "",
+			  "",
+
+			  "",				/* 100 */
+			  "",
+			  "",
+			  "",
+			  "H1_AP_INT_N",
+			  "",
+			  "AMP_BCLK",
+			  "AMP_DIN",
+			  "AMP_LRCLK",
+			  "UIM1_DATA_GPIO_109",
+
+			  "UIM1_CLK_GPIO_110",		/* 110 */
+			  "UIM1_RESET_GPIO_111",
+			  "",
+			  "UIM1_DATA",
+			  "UIM1_CLK",
+			  "UIM1_RESET",
+			  "UIM1_PRESENT",
+			  "SDM_RFFE0_CLK",
+			  "SDM_RFFE0_DATA",
+			  "",
+
+			  "SDM_RFFE1_DATA",		/* 120 */
+			  "SC_GPIO_121",
+			  "FASTBOOT_SEL_1",
+			  "SC_GPIO_123",
+			  "FASTBOOT_SEL_2",
+			  "SM_RFFE4_CLK_GRFC_8",
+			  "SM_RFFE4_DATA_GRFC_9",
+			  "WLAN_COEX_UART1_RX",
+			  "WLAN_COEX_UART1_TX",
+			  "",
+
+			  "",				/* 130 */
+			  "",
+			  "",
+			  "SDR_QLINK_REQ",
+			  "SDR_QLINK_EN",
+			  "QLINK0_WMSS_RESET_N",
+			  "SMR526_QLINK1_REQ",
+			  "SMR526_QLINK1_EN",
+			  "SMR526_QLINK1_WMSS_RESET_N",
+			  "",
+
+			  "SAR1_INT_N",			/* 140 */
+			  "SAR0_INT_N",
+			  "",
+			  "",
+			  "WCD_SWR_TX_CLK",
+			  "WCD_SWR_TX_DATA0",
+			  "WCD_SWR_TX_DATA1",
+			  "WCD_SWR_RX_CLK",
+			  "WCD_SWR_RX_DATA0",
+			  "WCD_SWR_RX_DATA1",
+
+			  "DMIC01_CLK",			/* 150 */
+			  "DMIC01_DATA",
+			  "DMIC23_CLK",
+			  "DMIC23_DATA",
+			  "",
+			  "",
+			  "EC_IN_RW_N",
+			  "EN_PP3300_HUB",
+			  "WCD_SWR_TX_DATA2",
+			  "",
+
+			  "",				/* 160 */
+			  "",
+			  "",
+			  "",
+			  "",
+			  "",
+			  "",
+			  "",
+			  "",
+			  "",
+
+			  "",				/* 170 */
+			  "MOS_BLE_UART_TX",
+			  "MOS_BLE_UART_RX",
+			  "",
+			  "",
+			  "";
+};
-- 
2.35.1.723.g4982287a31-goog

Re: [PATCH v1 4/4] arm64: dts: qcom: sc7280: Add CRD rev5

[Doug Anderson]

Hi,

On Wed, Mar 16, 2022 at 5:28 PM Matthias Kaehlcke <mka@chromium.org> wrote:
>
> Add support for Qualcomm's SC7280 CRD rev5 (aka CRD 3.0/3.1).
>
> Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
> ---
>
>  arch/arm64/boot/dts/qcom/Makefile             |   1 +
>  .../boot/dts/qcom/sc7280-herobrine-crd.dts    | 313 ++++++++++++++++++
>  2 files changed, 314 insertions(+)

Since I already pre-reviewed this patch before it was posted, I have
no comments. ;-)

Reviewed-by: Douglas Anderson <dianders@chromium.org>

Re: [PATCH v1 4/4] arm64: dts: qcom: sc7280: Add CRD rev5

[Stephen Boyd]

Quoting Matthias Kaehlcke (2022-03-16 17:28:20)
> Add support for Qualcomm's SC7280 CRD rev5 (aka CRD 3.0/3.1).
>
> Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
> ---

Reviewed-by: Stephen Boyd <swboyd@chromium.org>

Re: [PATCH v1 4/4] arm64: dts: qcom: sc7280: Add CRD rev5

[Rajendra Nayak]

On 3/17/2022 5:58 AM, Matthias Kaehlcke wrote:
> Add support for Qualcomm's SC7280 CRD rev5 (aka CRD 3.0/3.1).
> 
> Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
> ---

Reviewed-by: Rajendra Nayak <quic_rjendra@quicinc.com>

Re: [PATCH v1 1/4] arm64: dts: qcom: sc7280: Rename crd to crd-r3

[Doug Anderson]

Hi,

On Wed, Mar 16, 2022 at 5:28 PM Matthias Kaehlcke <mka@chromium.org> wrote:
>
> There are multiple revisions of CRD boards. The current sc7280-crd.dts
> describes revision 3 and 4 (aka CRD 1.0 and 2.0). Support for a newer
> version will be added by another patch. Add the revision number to
> distinguish it from the versionn. Also add the revision numbers to
> the compatible string.
>
> Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
> ---
>
>  arch/arm64/boot/dts/qcom/Makefile                             | 2 +-
>  .../arm64/boot/dts/qcom/{sc7280-crd.dts => sc7280-crd-r3.dts} | 4 ++--
>  2 files changed, 3 insertions(+), 3 deletions(-)

Reviewed-by: Douglas Anderson <dianders@chromium.org>

Re: [PATCH v1 1/4] arm64: dts: qcom: sc7280: Rename crd to crd-r3

[Stephen Boyd]

Quoting Matthias Kaehlcke (2022-03-16 17:28:17)
> There are multiple revisions of CRD boards. The current sc7280-crd.dts
> describes revision 3 and 4 (aka CRD 1.0 and 2.0). Support for a newer
> version will be added by another patch. Add the revision number to
> distinguish it from the versionn. Also add the revision numbers to
> the compatible string.
>
> Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
> ---

Reviewed-by: Stephen Boyd <swboyd@chromium.org>

Re: [PATCH v1 1/4] arm64: dts: qcom: sc7280: Rename crd to crd-r3

[Rajendra Nayak]

On 3/17/2022 5:58 AM, Matthias Kaehlcke wrote:
> There are multiple revisions of CRD boards. The current sc7280-crd.dts
> describes revision 3 and 4 (aka CRD 1.0 and 2.0). Support for a newer
> version will be added by another patch. Add the revision number to
> distinguish it from the versionn. Also add the revision numbers to
> the compatible string.
> 
> Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
> ---
> 

Reviewed-by: Rajendra Nayak <quic_rjendra@quicinc.com>