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[66.90.144.107]) by smtp.gmail.com with ESMTPSA id r19-20020acaa813000000b002ed02ca6a3fsm7995244oie.1.2022.03.21.14.50.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 21 Mar 2022 14:51:00 -0700 (PDT) Received: (nullmailer pid 600564 invoked by uid 1000); Mon, 21 Mar 2022 21:50:59 -0000 Date: Mon, 21 Mar 2022 16:50:59 -0500 From: Rob Herring To: Ansuel Smith Cc: Bjorn Andersson , Andy Gross , Michael Turquette , Stephen Boyd , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, Krzysztof Kozlowski Subject: Re: [PATCH v5 15/18] dt-bindings: clock: Add L2 clocks to qcom,krait-cc Documentation Message-ID: References: <20220321153855.12082-1-ansuelsmth@gmail.com> <20220321153855.12082-16-ansuelsmth@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20220321153855.12082-16-ansuelsmth@gmail.com> Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On Mon, Mar 21, 2022 at 04:38:52PM +0100, Ansuel Smith wrote: > Krait-cc qcom driver provide also L2 clocks and require the acpu_l2_aux > and the hfpll_l2 clock to be provided. Add these missing clocks to the > Documentation. The driver keep support for both old and this new > implementation and should prevent any regression by this fixup. Depends on what the old driver looks for. > Signed-off-by: Ansuel Smith > Reviewed-by: Krzysztof Kozlowski > --- > .../devicetree/bindings/clock/qcom,krait-cc.yaml | 12 ++++++++---- > 1 file changed, 8 insertions(+), 4 deletions(-) > > diff --git a/Documentation/devicetree/bindings/clock/qcom,krait-cc.yaml b/Documentation/devicetree/bindings/clock/qcom,krait-cc.yaml > index e879bfbe67ac..f89b70ab01ae 100644 > --- a/Documentation/devicetree/bindings/clock/qcom,krait-cc.yaml > +++ b/Documentation/devicetree/bindings/clock/qcom,krait-cc.yaml > @@ -23,16 +23,20 @@ properties: > items: > - description: phandle to hfpll for CPU0 mux > - description: phandle to hfpll for CPU1 mux > + - description: phandle to hfpll for L2 mux > - description: phandle to CPU0 aux clock > - description: phandle to CPU1 aux clock > + - description: phandle to L2 aux clock > - description: phandle to QSB fixed clk Clock indices should not change. New clocks go on the end of the list. > > clock-names: > items: > - const: hfpll0 > - const: hfpll1 > + - const: hfpll_l2 > - const: acpu0_aux > - const: acpu1_aux > + - const: acpu_l2_aux > - const: qsb > > '#clock-cells': > @@ -50,10 +54,10 @@ examples: > - | > clock-controller { > compatible = "qcom,krait-cc-v1"; > - clocks = <&hfpll0>, <&hfpll1>, > - <&acpu0_aux>, <&acpu1_aux>, <&qsb>; > - clock-names = "hfpll0", "hfpll1", > - "acpu0_aux", "acpu1_aux", "qsb"; > + clocks = <&hfpll0>, <&hfpll1>, <&hfpll_l2>, > + <&acpu0_aux>, <&acpu1_aux>, <&acpu_l2_aux>, <&qsb>; > + clock-names = "hfpll0", "hfpll1", "hfpll_l2", > + "acpu0_aux", "acpu1_aux", "acpu_l2_aux", "qsb"; > #clock-cells = <1>; > }; > ... > -- > 2.34.1 > >