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[66.90.144.107]) by smtp.gmail.com with ESMTPSA id q11-20020a4a330b000000b003289cbe97c6sm268863ooq.13.2022.03.31.13.37.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 31 Mar 2022 13:37:45 -0700 (PDT) Received: (nullmailer pid 1450145 invoked by uid 1000); Thu, 31 Mar 2022 20:37:44 -0000 Date: Thu, 31 Mar 2022 15:37:44 -0500 From: Rob Herring To: Jacky Huang Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, sboyd@kernel.org, krzk+dt@kernel.org, arnd@arndb.de, olof@lixom.net, soc@kernel.org, cfli0@nuvoton.com Subject: Re: [PATCH 2/3] dt-bindings: clock: Document MA35D1 clock controller bindings Message-ID: References: <20220331024256.14762-1-ychuang3@nuvoton.com> <20220331024256.14762-3-ychuang3@nuvoton.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20220331024256.14762-3-ychuang3@nuvoton.com> Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On Thu, Mar 31, 2022 at 10:42:55AM +0800, Jacky Huang wrote: > Add documentation to describe Nuvoton MA35D1 clock driver bindings. > > Signed-off-by: Jacky Huang > --- > .../bindings/clock/nuvoton,ma35d1-clk.yaml | 59 +++++++++++++++++++ > 1 file changed, 59 insertions(+) > create mode 100644 Documentation/devicetree/bindings/clock/nuvoton,ma35d1-clk.yaml > > diff --git a/Documentation/devicetree/bindings/clock/nuvoton,ma35d1-clk.yaml b/Documentation/devicetree/bindings/clock/nuvoton,ma35d1-clk.yaml > new file mode 100644 > index 000000000000..bf5474b10420 > --- /dev/null > +++ b/Documentation/devicetree/bindings/clock/nuvoton,ma35d1-clk.yaml > @@ -0,0 +1,59 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/clock/nuvoton,ma35d1-clk.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Nuvoton MA35D1 Clock Control Module Binding > + > +maintainers: > + - Chi-Fang Li > + - Jacky Huang > + > +description: | > + The MA35D1 clock controller generates clocks for the whole chip, > + including system clocks and all peripheral clocks. > + > + See also: > + dt-bindings/clock/ma35d1-clk.h > + > +properties: > + compatible: > + const: nuvoton,ma35d1-clk > + > + reg: > + maxItems: 1 > + > + "#clock-cells": > + const: 1 > + > + clocks: > + maxItems: 1 > + > + assigned-clocks: > + maxItems: 4 These aren't usually in the clock controller... > + > + assigned-clock-rates: > + maxItems: 4 > + > + clock-pll-mode: > + maxItems: 4 What's this? Not a standard property. Needs a type, description, and vendor prefix. > + > +required: > + - compatible > + - reg > + - "#clock-cells" > + > +additionalProperties: false > + > +examples: > + # clock control module node: > + - | > + #include > + > + clk: clock-controller@40460200 { > + compatible = "nuvoton,ma35d1-clk"; > + reg = <0x40460200 0x100>; > + #clock-cells = <1>; > + }; > +... > -- > 2.30.2 > >