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[66.90.144.107]) by smtp.gmail.com with ESMTPSA id t14-20020a05683014ce00b005b23657f66esm30059otq.31.2022.04.14.06.53.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 14 Apr 2022 06:53:33 -0700 (PDT) Received: (nullmailer pid 1898802 invoked by uid 1000); Thu, 14 Apr 2022 13:53:32 -0000 Date: Thu, 14 Apr 2022 08:53:32 -0500 From: Rob Herring To: Kartik Cc: jassisinghbrar@gmail.com, krzk+dt@kernel.org, thierry.reding@gmail.com, jonathanh@nvidia.com, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-tegra@vger.kernel.org Subject: Re: [PATCH 2/3] dt-bindings: tegra186-hsp: add type for shared mailboxes Message-ID: References: <1649921757-16919-1-git-send-email-kkartik@nvidia.com> <1649921757-16919-3-git-send-email-kkartik@nvidia.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1649921757-16919-3-git-send-email-kkartik@nvidia.com> Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On Thu, Apr 14, 2022 at 01:05:56PM +0530, Kartik wrote: > Tegra234 supports sending/receiving 32-bit and 128-bit data over > a shared mailbox. Based on the data size to be used, clients need > to specify the type of shared mailbox in the device tree. > > Add a macro for 128-bit shared mailbox. Mailbox clients can use this > macro as a flag in device tree to enable 128-bit data support for a > shared mailbox. > > Signed-off-by: Kartik Need a full name here. > --- > .../devicetree/bindings/mailbox/nvidia,tegra186-hsp.yaml | 9 +++++++++ > include/dt-bindings/mailbox/tegra186-hsp.h | 5 +++++ > 2 files changed, 14 insertions(+) > > diff --git a/Documentation/devicetree/bindings/mailbox/nvidia,tegra186-hsp.yaml b/Documentation/devicetree/bindings/mailbox/nvidia,tegra186-hsp.yaml > index 9f7a7296b57f..a3e87516d637 100644 > --- a/Documentation/devicetree/bindings/mailbox/nvidia,tegra186-hsp.yaml > +++ b/Documentation/devicetree/bindings/mailbox/nvidia,tegra186-hsp.yaml > @@ -26,6 +26,15 @@ description: | > second cell is used to identify the mailbox that the client is going > to use. > > + For shared mailboxes, the first cell composed of two fields: > + - bits 15..8: > + A bit mask of flags that further specifies the type of shared > + mailbox to be used (based on the data size). If no flag is > + specified then, 32-bit shared mailbox is used. > + - bits 7..0: > + Defines the type of the mailbox to be used. This field should be > + TEGRA_HSP_MBOX_TYPE_SM for shared mailboxes. > + > For doorbells, the second cell specifies the index of the doorbell to > use. > > diff --git a/include/dt-bindings/mailbox/tegra186-hsp.h b/include/dt-bindings/mailbox/tegra186-hsp.h > index 3bdec7a84d35..b9ccae2aa9e2 100644 > --- a/include/dt-bindings/mailbox/tegra186-hsp.h > +++ b/include/dt-bindings/mailbox/tegra186-hsp.h > @@ -15,6 +15,11 @@ > #define TEGRA_HSP_MBOX_TYPE_SS 0x2 > #define TEGRA_HSP_MBOX_TYPE_AS 0x3 > > +/* > + * These define the types of shared mailbox supported based on data size. > + */ > +#define TEGRA_HSP_MBOX_TYPE_SM_128BIT (1 << 8) > + > /* > * These defines represent the bit associated with the given master ID in the > * doorbell registers. > -- > 2.17.1 > >