* [PATCH v2 1/2] dt-bindings: display: bridge: ldb: Implement simple NXP i.MX8M LDB bridge
@ 2022-04-18 14:51 Marek Vasut
2022-04-22 18:23 ` Sam Ravnborg
2022-04-22 18:26 ` Sam Ravnborg
0 siblings, 2 replies; 4+ messages in thread
From: Marek Vasut @ 2022-04-18 14:51 UTC (permalink / raw)
To: dri-devel
Cc: Marek Vasut, Laurent Pinchart, Lucas Stach, Maxime Ripard,
Peng Fan, Rob Herring, Robby Cai, Robert Foss, Sam Ravnborg,
Thomas Zimmermann, devicetree
The i.MX8MP contains two syscon registers which are responsible
for configuring the on-SoC DPI-to-LVDS serializer. Add DT binding
which represents this serializer as a bridge.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Cc: Lucas Stach <l.stach@pengutronix.de>
Cc: Maxime Ripard <maxime@cerno.tech>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Robby Cai <robby.cai@nxp.com>
Cc: Robert Foss <robert.foss@linaro.org>
Cc: Sam Ravnborg <sam@ravnborg.org>
Cc: Thomas Zimmermann <tzimmermann@suse.de>
Cc: devicetree@vger.kernel.org
To: dri-devel@lists.freedesktop.org
---
V2: - Consistently use fsl,imx8mp-ldb as compatible
- Drop items: from compatible:
- Replace minItems with maxItems in clocks:
- Drop quotes from clock-names const: ldb
- Rename syscon to fsl,syscon
- Use generic name of ldb-lvds in example
---
.../bindings/display/bridge/nxp,ldb.yaml | 96 +++++++++++++++++++
1 file changed, 96 insertions(+)
create mode 100644 Documentation/devicetree/bindings/display/bridge/nxp,ldb.yaml
diff --git a/Documentation/devicetree/bindings/display/bridge/nxp,ldb.yaml b/Documentation/devicetree/bindings/display/bridge/nxp,ldb.yaml
new file mode 100644
index 0000000000000..f3182566eb316
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/bridge/nxp,ldb.yaml
@@ -0,0 +1,96 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/bridge/nxp,ldb.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: NXP i.MX8M DPI to LVDS bridge chip
+
+maintainers:
+ - Marek Vasut <marex@denx.de>
+
+description: |
+ The i.MX8MP contains two syscon registers which are responsible
+ for configuring the on-SoC DPI-to-LVDS serializer. This describes
+ those registers as bridge within the DT.
+
+properties:
+ compatible:
+ const: fsl,imx8mp-ldb
+
+ clocks:
+ maxItems: 1
+
+ clock-names:
+ const: ldb
+
+ fsl,syscon:
+ $ref: /schemas/types.yaml#/definitions/phandle
+ description: A phandle to media block controller.
+
+ ports:
+ $ref: /schemas/graph.yaml#/properties/ports
+
+ properties:
+ port@0:
+ $ref: /schemas/graph.yaml#/properties/port
+ description: Video port for DPI input.
+
+ port@1:
+ $ref: /schemas/graph.yaml#/properties/port
+ description: Video port for LVDS Channel-A output (panel or bridge).
+
+ port@2:
+ $ref: /schemas/graph.yaml#/properties/port
+ description: Video port for LVDS Channel-B output (panel or bridge).
+
+ required:
+ - port@0
+ - port@1
+
+required:
+ - compatible
+ - clocks
+ - fsl,syscon
+ - ports
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/imx8mp-clock.h>
+
+ bridge {
+ compatible = "fsl,imx8mp-ldb";
+ clocks = <&clk IMX8MP_CLK_MEDIA_LDB>;
+ clock-names = "ldb";
+ fsl,syscon = <&media_blk_ctrl>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+
+ ldb_from_lcdif2: endpoint {
+ remote-endpoint = <&lcdif2_to_ldb>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+
+ ldb_lvds_ch0: endpoint {
+ remote-endpoint = <&ldb_to_lvdsx4panel>;
+ };
+ };
+
+ port@2 {
+ reg = <2>;
+
+ ldb_lvds_ch1: endpoint {
+ };
+ };
+ };
+ };
--
2.35.1
^ permalink raw reply related [flat|nested] 4+ messages in thread* Re: [PATCH v2 1/2] dt-bindings: display: bridge: ldb: Implement simple NXP i.MX8M LDB bridge
2022-04-18 14:51 [PATCH v2 1/2] dt-bindings: display: bridge: ldb: Implement simple NXP i.MX8M LDB bridge Marek Vasut
@ 2022-04-22 18:23 ` Sam Ravnborg
2022-04-22 18:26 ` Sam Ravnborg
1 sibling, 0 replies; 4+ messages in thread
From: Sam Ravnborg @ 2022-04-22 18:23 UTC (permalink / raw)
To: Marek Vasut
Cc: dri-devel, Laurent Pinchart, Lucas Stach, Maxime Ripard, Peng Fan,
Rob Herring, Robby Cai, Robert Foss, Thomas Zimmermann,
devicetree
On Mon, Apr 18, 2022 at 04:51:04PM +0200, Marek Vasut wrote:
> The i.MX8MP contains two syscon registers which are responsible
> for configuring the on-SoC DPI-to-LVDS serializer. Add DT binding
> which represents this serializer as a bridge.
>
> Signed-off-by: Marek Vasut <marex@denx.de>
> Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
> Cc: Lucas Stach <l.stach@pengutronix.de>
> Cc: Maxime Ripard <maxime@cerno.tech>
> Cc: Peng Fan <peng.fan@nxp.com>
> Cc: Rob Herring <robh+dt@kernel.org>
> Cc: Robby Cai <robby.cai@nxp.com>
> Cc: Robert Foss <robert.foss@linaro.org>
> Cc: Sam Ravnborg <sam@ravnborg.org>
> Cc: Thomas Zimmermann <tzimmermann@suse.de>
> Cc: devicetree@vger.kernel.org
> To: dri-devel@lists.freedesktop.org
Acked-by: Sam Ravnborg <sam@ravnborg.org> but you need an ack from
someone else before you apply as I am not an expert here.
Sam
> ---
> V2: - Consistently use fsl,imx8mp-ldb as compatible
> - Drop items: from compatible:
> - Replace minItems with maxItems in clocks:
> - Drop quotes from clock-names const: ldb
> - Rename syscon to fsl,syscon
> - Use generic name of ldb-lvds in example
> ---
> .../bindings/display/bridge/nxp,ldb.yaml | 96 +++++++++++++++++++
> 1 file changed, 96 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/display/bridge/nxp,ldb.yaml
>
> diff --git a/Documentation/devicetree/bindings/display/bridge/nxp,ldb.yaml b/Documentation/devicetree/bindings/display/bridge/nxp,ldb.yaml
> new file mode 100644
> index 0000000000000..f3182566eb316
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/display/bridge/nxp,ldb.yaml
> @@ -0,0 +1,96 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/display/bridge/nxp,ldb.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: NXP i.MX8M DPI to LVDS bridge chip
> +
> +maintainers:
> + - Marek Vasut <marex@denx.de>
> +
> +description: |
> + The i.MX8MP contains two syscon registers which are responsible
> + for configuring the on-SoC DPI-to-LVDS serializer. This describes
> + those registers as bridge within the DT.
> +
> +properties:
> + compatible:
> + const: fsl,imx8mp-ldb
> +
> + clocks:
> + maxItems: 1
> +
> + clock-names:
> + const: ldb
> +
> + fsl,syscon:
> + $ref: /schemas/types.yaml#/definitions/phandle
> + description: A phandle to media block controller.
> +
> + ports:
> + $ref: /schemas/graph.yaml#/properties/ports
> +
> + properties:
> + port@0:
> + $ref: /schemas/graph.yaml#/properties/port
> + description: Video port for DPI input.
> +
> + port@1:
> + $ref: /schemas/graph.yaml#/properties/port
> + description: Video port for LVDS Channel-A output (panel or bridge).
> +
> + port@2:
> + $ref: /schemas/graph.yaml#/properties/port
> + description: Video port for LVDS Channel-B output (panel or bridge).
> +
> + required:
> + - port@0
> + - port@1
> +
> +required:
> + - compatible
> + - clocks
> + - fsl,syscon
> + - ports
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/clock/imx8mp-clock.h>
> +
> + bridge {
> + compatible = "fsl,imx8mp-ldb";
> + clocks = <&clk IMX8MP_CLK_MEDIA_LDB>;
> + clock-names = "ldb";
> + fsl,syscon = <&media_blk_ctrl>;
> +
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@0 {
> + reg = <0>;
> +
> + ldb_from_lcdif2: endpoint {
> + remote-endpoint = <&lcdif2_to_ldb>;
> + };
> + };
> +
> + port@1 {
> + reg = <1>;
> +
> + ldb_lvds_ch0: endpoint {
> + remote-endpoint = <&ldb_to_lvdsx4panel>;
> + };
> + };
> +
> + port@2 {
> + reg = <2>;
> +
> + ldb_lvds_ch1: endpoint {
> + };
> + };
> + };
> + };
> --
> 2.35.1
^ permalink raw reply [flat|nested] 4+ messages in thread* Re: [PATCH v2 1/2] dt-bindings: display: bridge: ldb: Implement simple NXP i.MX8M LDB bridge
2022-04-18 14:51 [PATCH v2 1/2] dt-bindings: display: bridge: ldb: Implement simple NXP i.MX8M LDB bridge Marek Vasut
2022-04-22 18:23 ` Sam Ravnborg
@ 2022-04-22 18:26 ` Sam Ravnborg
2022-04-23 2:09 ` Marek Vasut
1 sibling, 1 reply; 4+ messages in thread
From: Sam Ravnborg @ 2022-04-22 18:26 UTC (permalink / raw)
To: Marek Vasut
Cc: dri-devel, Laurent Pinchart, Lucas Stach, Maxime Ripard, Peng Fan,
Rob Herring, Robby Cai, Robert Foss, Thomas Zimmermann,
devicetree
Hi Marek, I read the patch once more.
On Mon, Apr 18, 2022 at 04:51:04PM +0200, Marek Vasut wrote:
> The i.MX8MP contains two syscon registers which are responsible
Here it says i.MX8MP
> for configuring the on-SoC DPI-to-LVDS serializer. Add DT binding
> which represents this serializer as a bridge.
>
> Signed-off-by: Marek Vasut <marex@denx.de>
> Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
> Cc: Lucas Stach <l.stach@pengutronix.de>
> Cc: Maxime Ripard <maxime@cerno.tech>
> Cc: Peng Fan <peng.fan@nxp.com>
> Cc: Rob Herring <robh+dt@kernel.org>
> Cc: Robby Cai <robby.cai@nxp.com>
> Cc: Robert Foss <robert.foss@linaro.org>
> Cc: Sam Ravnborg <sam@ravnborg.org>
> Cc: Thomas Zimmermann <tzimmermann@suse.de>
> Cc: devicetree@vger.kernel.org
> To: dri-devel@lists.freedesktop.org
> ---
> V2: - Consistently use fsl,imx8mp-ldb as compatible
> - Drop items: from compatible:
> - Replace minItems with maxItems in clocks:
> - Drop quotes from clock-names const: ldb
> - Rename syscon to fsl,syscon
> - Use generic name of ldb-lvds in example
> ---
> .../bindings/display/bridge/nxp,ldb.yaml | 96 +++++++++++++++++++
> 1 file changed, 96 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/display/bridge/nxp,ldb.yaml
>
> diff --git a/Documentation/devicetree/bindings/display/bridge/nxp,ldb.yaml b/Documentation/devicetree/bindings/display/bridge/nxp,ldb.yaml
> new file mode 100644
> index 0000000000000..f3182566eb316
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/display/bridge/nxp,ldb.yaml
> @@ -0,0 +1,96 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/display/bridge/nxp,ldb.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: NXP i.MX8M DPI to LVDS bridge chip
Here it says i.MX8M
> +
> +maintainers:
> + - Marek Vasut <marex@denx.de>
> +
> +description: |
> + The i.MX8MP contains two syscon registers which are responsible
Here it says i.MX8MP
> + for configuring the on-SoC DPI-to-LVDS serializer. This describes
> + those registers as bridge within the DT.
> +
> +properties:
> + compatible:
> + const: fsl,imx8mp-ldb
Here it says fsl,imx8mp
It looks a little inconsistent, I guess the title needs a fix.
a-b stands with the title fixed.
Sam
> +
> + clocks:
> + maxItems: 1
> +
> + clock-names:
> + const: ldb
> +
> + fsl,syscon:
> + $ref: /schemas/types.yaml#/definitions/phandle
> + description: A phandle to media block controller.
> +
> + ports:
> + $ref: /schemas/graph.yaml#/properties/ports
> +
> + properties:
> + port@0:
> + $ref: /schemas/graph.yaml#/properties/port
> + description: Video port for DPI input.
> +
> + port@1:
> + $ref: /schemas/graph.yaml#/properties/port
> + description: Video port for LVDS Channel-A output (panel or bridge).
> +
> + port@2:
> + $ref: /schemas/graph.yaml#/properties/port
> + description: Video port for LVDS Channel-B output (panel or bridge).
> +
> + required:
> + - port@0
> + - port@1
> +
> +required:
> + - compatible
> + - clocks
> + - fsl,syscon
> + - ports
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/clock/imx8mp-clock.h>
> +
> + bridge {
> + compatible = "fsl,imx8mp-ldb";
> + clocks = <&clk IMX8MP_CLK_MEDIA_LDB>;
> + clock-names = "ldb";
> + fsl,syscon = <&media_blk_ctrl>;
> +
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@0 {
> + reg = <0>;
> +
> + ldb_from_lcdif2: endpoint {
> + remote-endpoint = <&lcdif2_to_ldb>;
> + };
> + };
> +
> + port@1 {
> + reg = <1>;
> +
> + ldb_lvds_ch0: endpoint {
> + remote-endpoint = <&ldb_to_lvdsx4panel>;
> + };
> + };
> +
> + port@2 {
> + reg = <2>;
> +
> + ldb_lvds_ch1: endpoint {
> + };
> + };
> + };
> + };
> --
> 2.35.1
^ permalink raw reply [flat|nested] 4+ messages in thread* Re: [PATCH v2 1/2] dt-bindings: display: bridge: ldb: Implement simple NXP i.MX8M LDB bridge
2022-04-22 18:26 ` Sam Ravnborg
@ 2022-04-23 2:09 ` Marek Vasut
0 siblings, 0 replies; 4+ messages in thread
From: Marek Vasut @ 2022-04-23 2:09 UTC (permalink / raw)
To: Sam Ravnborg
Cc: dri-devel, Laurent Pinchart, Lucas Stach, Maxime Ripard, Peng Fan,
Rob Herring, Robby Cai, Robert Foss, Thomas Zimmermann,
devicetree
On 4/22/22 20:26, Sam Ravnborg wrote:
> Hi Marek, I read the patch once more.
>
> On Mon, Apr 18, 2022 at 04:51:04PM +0200, Marek Vasut wrote:
>> The i.MX8MP contains two syscon registers which are responsible
>
> Here it says i.MX8MP
Fixed, this and the bindings.
^ permalink raw reply [flat|nested] 4+ messages in thread
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2022-04-18 14:51 [PATCH v2 1/2] dt-bindings: display: bridge: ldb: Implement simple NXP i.MX8M LDB bridge Marek Vasut
2022-04-22 18:23 ` Sam Ravnborg
2022-04-22 18:26 ` Sam Ravnborg
2022-04-23 2:09 ` Marek Vasut
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