Re: [PATCH 2/8] dt-bindings: nvmem: sfp: Add clock properties

[Rob Herring <robh@kernel.org>]

On Thu, Apr 21, 2022 at 08:12:34PM +0200, Michael Walle wrote:
> Am 2022-04-21 19:56, schrieb Sean Anderson:
> > To program fuses, it is necessary to set the fuse programming time. This
> > is determined based on the value of the platform clock. Add a clock
> > property.
> 
> For some context: Sean was adding the SFP support in u-boot and
> I referred him to this binding. I didn't need the clock to just
> read the data. But Sean is right, we need the clock for the
> programming. I was unaware of that. The binding is still yet to
> be released with v5.18, thus I think it is still possible to make
> the clock mandatory.

Please add this detail to the commit message. Otherwise, it looks like 
an ABI break to make a new property required.

> 
> > Signed-off-by: Sean Anderson <sean.anderson@seco.com>
> 
> Fixes: 6f9817cdcc82 ("dt-bindings: nvmem: add fsl,layerscape-sfp binding")
> 
> -michael
> 
> > ---
> > 
> >  .../bindings/nvmem/fsl,layerscape-sfp.yaml         | 14 ++++++++++++++
> >  1 file changed, 14 insertions(+)
> > 
> > diff --git
> > a/Documentation/devicetree/bindings/nvmem/fsl,layerscape-sfp.yaml
> > b/Documentation/devicetree/bindings/nvmem/fsl,layerscape-sfp.yaml
> > index b7798e903191..54086f50157d 100644
> > --- a/Documentation/devicetree/bindings/nvmem/fsl,layerscape-sfp.yaml
> > +++ b/Documentation/devicetree/bindings/nvmem/fsl,layerscape-sfp.yaml
> > @@ -24,15 +24,29 @@ properties:
> >    reg:
> >      maxItems: 1
> > 
> > +  clocks:
> > +    maxItems: 1
> > +    description:
> > +      The SFP clock. Typically, this is the platform clock divided by
> > 4.
> > +
> > +  clock-names:
> > +    const: sfp
> > +
> >  required:
> >    - compatible
> >    - reg
> > +  - clock-names
> > +  - clocks
> > 
> >  unevaluatedProperties: false
> > 
> >  examples:
> >    - |
> > +    #include <dt-bindings/clock/fsl,qoriq-clockgen.h>
> >      efuse@1e80000 {
> >          compatible = "fsl,ls1028a-sfp";
> >          reg = <0x1e80000 0x8000>;
> > +        clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
> > +                            QORIQ_CLK_PLL_DIV(4)>;
> > +        clock-names = "sfp";
> >      };