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[66.90.144.107]) by smtp.gmail.com with ESMTPSA id j3-20020a4ad2c3000000b0035e9f4cea22sm636452oos.20.2022.04.27.12.33.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 27 Apr 2022 12:33:02 -0700 (PDT) Received: (nullmailer pid 530546 invoked by uid 1000); Wed, 27 Apr 2022 19:33:02 -0000 Date: Wed, 27 Apr 2022 14:33:02 -0500 From: Rob Herring To: Andre Przywara Cc: Krzysztof Kozlowski , Liviu Dudau , Robin Murphy , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: Re: [PATCH 06/11] dt-bindings: arm: convert vexpress-sysregs to DT schema Message-ID: References: <20220427112528.4097815-1-andre.przywara@arm.com> <20220427112528.4097815-7-andre.przywara@arm.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20220427112528.4097815-7-andre.przywara@arm.com> Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On Wed, Apr 27, 2022 at 12:25:23PM +0100, Andre Przywara wrote: > The Arm Versatile Express system control register block provides GPIO > functionality to some devices and is also used for board identification. > > Extract the first half of the informal vexpress-sysreg.txt binding and > make it proper DT schema compliant. > > Signed-off-by: Andre Przywara > --- > .../bindings/arm/vexpress-sysreg.yaml | 89 +++++++++++++++++++ > 1 file changed, 89 insertions(+) > create mode 100644 Documentation/devicetree/bindings/arm/vexpress-sysreg.yaml > > diff --git a/Documentation/devicetree/bindings/arm/vexpress-sysreg.yaml b/Documentation/devicetree/bindings/arm/vexpress-sysreg.yaml > new file mode 100644 > index 0000000000000..b5c03ebba6a6e > --- /dev/null > +++ b/Documentation/devicetree/bindings/arm/vexpress-sysreg.yaml > @@ -0,0 +1,89 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/arm/vexpress-sysreg.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: ARM Versatile Express system registers bindings > + > +maintainers: > + - Andre Przywara > + > +description: |+ Don't need '|+' unless you have formatting to maintain and you don't. > + This is a system control registers block, providing multiple low level > + platform functions like board detection and identification, software > + interrupt generation, MMC and NOR Flash control etc. comma ^ > + > +properties: > + compatible: > + const: arm,vexpress-sysreg > + > + reg: > + maxItems: 1 > + > + "#address-cells": > + const: 1 > + > + "#size-cells": > + const: 1 > + > + ranges: true > + > +additionalProperties: false > + > +patternProperties: > + '^gpio@[0-9a-fA-F]+$': Lowercase hex only for unit address. > + type: object additionalProperties: false > + description: > + GPIO children > + > + properties: > + compatible: > + enum: > + - arm,vexpress-sysreg,sys_led > + - arm,vexpress-sysreg,sys_mci > + - arm,vexpress-sysreg,sys_flash > + > + gpio-controller: true > + > + "#gpio-cells": > + const: 2 > + description: | > + The first cell is the function number: > + for sys_led : 0..7 = LED 0..7 > + for sys_mci : 0 = MMC CARDIN, 1 = MMC WPROT > + for sys_flash : 0 = NOR FLASH WPn > + The second cell can take standard GPIO flags. > + > + reg: > + maxItems: 1 > + > + required: > + - compatible > + - reg > + - gpio-controller > + - "#gpio-cells" > + > +required: > + - compatible > + - "#address-cells" > + - "#size-cells" > + > +examples: > + - | > + sysreg@0 { > + compatible = "arm,vexpress-sysreg"; > + reg = <0x00000 0x1000>; > + #address-cells = <1>; > + #size-cells = <1>; > + ranges = <0 0 0x1000>; > + > + v2m_led_gpios: gpio@8 { > + compatible = "arm,vexpress-sysreg,sys_led"; > + reg = <0x008 4>; > + gpio-controller; > + #gpio-cells = <2>; > + }; > + }; > + > +... > -- > 2.25.1 > >