Re: [PATCH v12 4/4] arm64: dts: qcom: sc7280-herobrine: Add lpi pinmux properties for CRD 3.0/3.1

Matthias Kaehlcke
2022-04-29T00:02:20Z

On Wed, Apr 27, 2022 at 10:39:43PM +0530, Srinivasa Rao Mandadapu wrote:
> Add LPASS LPI pinctrl properties, which are required for Audio
> functionality on herobrine based platforms of rev5+
> (aka CRD 3.0/3.1) boards.
>
> Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com>
> Co-developed-by: Venkata Prasad Potturu <quic_potturu@quicinc.com>
> Signed-off-by: Venkata Prasad Potturu <quic_potturu@quicinc.com>

I'm not super firm in pinctrl territory, a few maybe silly questions
below.

> arch/arm64/boot/dts/qcom/sc7280-herobrine-crd.dts | 84 +++++++++++++++++++++++
> 1 file changed, 84 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sc7280-herobrine-crd.dts b/arch/arm64/boot/dts/qcom/sc7280-herobrine-crd.dts
> index deaea3a..dfc42df 100644
> --- a/arch/arm64/boot/dts/qcom/sc7280-herobrine-crd.dts
> +++ b/arch/arm64/boot/dts/qcom/sc7280-herobrine-crd.dts
> @@ -111,6 +111,90 @@ ap_ts_pen_1v8: &i2c13 {
> * - If a pin is not hooked up on Qcard, it gets no name.
> */
>
> +&lpass_dmic01 {
> + clk {
> + drive-strength = <8>;
> + };
> +};
> +
> +&lpass_dmic01_sleep {
> + clk {
> + drive-strength = <2>;

Does the drive strength really matter in the sleep state, is the SoC actively
driving the pin?

> + bias-disable;

What should this be in active/default state? If I understand correctly
after a transition from 'sleep' to 'default' this setting will remain,
since the default config doesn't specify a setting for bias.

> + };
> +
> + data {
> + pull-down;

Same here, I think the pull-down will still be enabled after a switch from
'sleep' to 'default'.

If I'm not mistaken then the rest of the pins also need to be reviewed.

> + };
> +};
> +
> +&lpass_dmic23 {
> + clk {
> + drive-strength = <8>;
> + };
> +};
> +
> +&lpass_dmic23_sleep {
> + clk {
> + drive-strength = <2>;
> + bias-disable;
> + };
> +
> + data {
> + pull-down;
> + };
> +};
> +
> +&lpass_rx_swr {
> + clk {
> + drive-strength = <2>;
> + slew-rate = <1>;
> + bias-disable;
> + };
> +
> + data {
> + drive-strength = <2>;
> + slew-rate = <1>;
> + bias-bus-hold;
> + };
> +};
> +
> +&lpass_rx_swr_sleep {
> + clk {
> + drive-strength = <2>;
> + bias-pull-down;
> + };
> +
> + data {
> + drive-strength = <2>;
> + bias-pull-down;
> + };
> +};
> +
> +&lpass_tx_swr {
> + clk {
> + drive-strength = <2>;
> + slew-rate = <1>;
> + bias-disable;
> + };
> +
> + data {
> + slew-rate = <1>;
> + bias-bus-hold;
> + };
> +};
> +
> +&lpass_tx_swr_sleep {
> + clk {
> + drive-strength = <2>;
> + bias-pull-down;
> + };
> +
> + data {
> + bias-bus-hold;
> + };
> +};
> +
> &mi2s1_data0 {
> drive-strength = <6>;
> bias-disable;
> --
> 2.7.4
>