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[2003:e4:1f12:c800:f22f:74ff:fe1f:3a53]) by smtp.gmail.com with ESMTPSA id s3-20020a1709067b8300b0070efa110afcsm8768854ejo.83.2022.06.30.02.13.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 30 Jun 2022 02:13:51 -0700 (PDT) Date: Thu, 30 Jun 2022 11:13:50 +0200 From: Thierry Reding To: Rob Herring , Kartik Cc: daniel.lezcano@linaro.org, tglx@linutronix.de, krzk+dt@kernel.org, jonathanh@nvidia.com, spujar@nvidia.com, akhilrajeev@nvidia.com, rgumasta@nvidia.com, pshete@nvidia.com, vidyas@nvidia.com, mperttunen@nvidia.com, mkumard@nvidia.com, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-tegra@vger.kernel.org Subject: Re: [PATCH v2 1/6] dt-bindings: timer: Add Tegra186 & Tegra234 Timer Message-ID: References: <1656527344-28861-1-git-send-email-kkartik@nvidia.com> <1656527344-28861-2-git-send-email-kkartik@nvidia.com> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="vd7lLC28doTmyfX4" Content-Disposition: inline In-Reply-To: <1656527344-28861-2-git-send-email-kkartik@nvidia.com> User-Agent: Mutt/2.2.6 (2022-06-05) Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org --vd7lLC28doTmyfX4 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Wed, Jun 29, 2022 at 11:58:59PM +0530, Kartik wrote: > The Tegra186 timer provides ten 29-bit timer counters and one 32-bit > timestamp counter. The Tegra234 timer provides sixteen 29-bit timer > counters and one 32-bit timestamp counter. Each NV timer selects its > timing reference signal from the 1 MHz reference generated by USEC, > TSC or either clk_m or OSC. Each TMR can be programmed to generate > one-shot, periodic, or watchdog interrupts. >=20 > Signed-off-by: Kartik > --- > .../bindings/timer/nvidia,tegra186-timer.yaml | 111 ++++++++++++++++++ > 1 file changed, 111 insertions(+) > create mode 100644 Documentation/devicetree/bindings/timer/nvidia,tegra1= 86-timer.yaml Rob, I've been wondering about patch application with these DT bindings. In the past I've preferred to apply these along with the driver changes that implement the bindings. I realize now that that's perhaps a bit naive because we've had cases where the driver doesn't fully implement everything in the binding as well as cases where the bindings are upstreamed without the driver necessarily being upstreamed at the same time. So I'm thinking that it makes more sense to apply the DT bindings to the same tree as the DT changes that add corresponding DT nodes. This would also get rid of the (usually temporary) inconsistencies when running the DT validation (and even just something like checkpatch) on a DT tree that doesn't have corresponding DT bindings. Do you have any strong preference on this? Thierry --vd7lLC28doTmyfX4 Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAmK9aU4ACgkQ3SOs138+ s6H5YA/+JP38fIDSYI7G6PH2+aHJjdG2V1dNqG/fVZBC13jryVWQ6IT8zFdHXxf4 0TR4H0NwXANXxNNOUIm1/nW+r32ekkyu+BZI5Z+8iyDHEVWBDWP2OL9KA6dTi7BL IsxiQ+YrU57t7+C8cVA9hme2e3neVsYLbfB+OnYo+O7E6jh4cnTOSviJ7y6TwIbK ESNxtqxgpX41KL+xUiGejk67w/HwTwQ+Muh1cQCqbIF5GmEdmMgo6GUAUmdiDCAs YkoQwSq5IQqVIwl7Ap6neo3btmuZHTn3WfIBnlfSGNLLv1rnh23NkJ/ZxAO1P/uR wAuy2oSO8GblE71Hc5ZBkfCnp+3KAqiU/XOT4xfmr/mIGKcc47HSVtQAqx51HwPF N2Nzd4CvUsasVVx0XGk3QsjlbPdxsqV4HOTQ8s7LY/32u2iK1Azw1uHS4Sat9+m2 BM/+qwwR0up2Gr4i1kicy2n/OO2F31s4fzliykF2ApPJp8auLynaKM2IEQNUWg9L g1nJ4AMELc6lgSkipk0qy8/uy0hOn7rHqI9hZFPbUGMIS2oz5k9kVRcBj4zL4wzq Ct2KQs3QjMqx12/LISaRmQLUoCQrfe/vTmhZr+om5M+RJprxLvW9DaT2HhrCBKvJ 3hqkIw+CDHOyzVxw+LL6oJTUbmGNk3Ta1f5YCOqzbifM3ZnLEJo= =m1P7 -----END PGP SIGNATURE----- --vd7lLC28doTmyfX4--