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[104.57.184.186]) by smtp.gmail.com with ESMTPSA id e12-20020a05680809ac00b0033a1c24effasm2073727oig.22.2022.07.13.13.44.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 13 Jul 2022 13:44:03 -0700 (PDT) Date: Wed, 13 Jul 2022 15:44:01 -0500 From: Bjorn Andersson To: Robert Marko Cc: agross@kernel.org, konrad.dybcio@somainline.org, jassisinghbrar@gmail.com, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, dmitry.baryshkov@linaro.org Subject: Re: [PATCH v6 2/4] mailbox: qcom-apcs-ipc: add IPQ8074 APSS clock controller support Message-ID: References: <20220707173733.404947-1-robimarko@gmail.com> <20220707173733.404947-2-robimarko@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20220707173733.404947-2-robimarko@gmail.com> Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On Thu 07 Jul 12:37 CDT 2022, Robert Marko wrote: > IPQ8074 has the APSS clock controller utilizing the same register space as > the APCS, so provide access to the APSS utilizing a child device like > IPQ6018 does as well, but just by utilizing the IPQ8074 specific APSS > clock driver. > > Signed-off-by: Robert Marko Reviewed-by: Bjorn Andersson Regards, Bjorn > --- > Changes in v6: > * Adjust max_register value using match data instead of globally > > Changes in v5: > * Use lower case hex for max_register > * Update the APSS clock name to match the new one without commas > --- > drivers/mailbox/qcom-apcs-ipc-mailbox.c | 8 +++++++- > 1 file changed, 7 insertions(+), 1 deletion(-) > > diff --git a/drivers/mailbox/qcom-apcs-ipc-mailbox.c b/drivers/mailbox/qcom-apcs-ipc-mailbox.c > index c05f3276d02c..5d6b41fa6256 100644 > --- a/drivers/mailbox/qcom-apcs-ipc-mailbox.c > +++ b/drivers/mailbox/qcom-apcs-ipc-mailbox.c > @@ -34,6 +34,12 @@ static const struct qcom_apcs_ipc_data ipq6018_apcs_data = { > .offset = 8, .clk_name = "qcom,apss-ipq6018-clk" > }; > > +static const struct qcom_apcs_ipc_data ipq8074_apcs_data = { > + .offset = 8, > + .max_register = 0x5ffc, > + .clk_name = "qcom-apss-ipq8074-clk" > +}; > + > static const struct qcom_apcs_ipc_data msm8916_apcs_data = { > .offset = 8, .clk_name = "qcom-apcs-msm8916-clk" > }; > @@ -148,7 +154,7 @@ static int qcom_apcs_ipc_remove(struct platform_device *pdev) > /* .data is the offset of the ipc register within the global block */ > static const struct of_device_id qcom_apcs_ipc_of_match[] = { > { .compatible = "qcom,ipq6018-apcs-apps-global", .data = &ipq6018_apcs_data }, > - { .compatible = "qcom,ipq8074-apcs-apps-global", .data = &msm8994_apcs_data }, > + { .compatible = "qcom,ipq8074-apcs-apps-global", .data = &ipq8074_apcs_data }, > { .compatible = "qcom,msm8916-apcs-kpss-global", .data = &msm8916_apcs_data }, > { .compatible = "qcom,msm8939-apcs-kpss-global", .data = &msm8916_apcs_data }, > { .compatible = "qcom,msm8953-apcs-kpss-global", .data = &msm8994_apcs_data }, > -- > 2.36.1 >