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Date:   Mon, 11 Jul 2022 11:36:04 +0200
From:   Johan Hovold <johan@kernel.org>
To:     Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Cc:     Johan Hovold <johan+linaro@kernel.org>,
        Bjorn Helgaas <bhelgaas@google.com>,
        Lorenzo Pieralisi <lpieralisi@kernel.org>,
        Rob Herring <robh+dt@kernel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
        Stanimir Varbanov <svarbanov@mm-sol.com>,
        Andy Gross <agross@kernel.org>,
        Bjorn Andersson <bjorn.andersson@linaro.org>,
        Krzysztof =?utf-8?Q?Wilczy=C5=84ski?= <kw@linux.com>,
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        linux-arm-msm@vger.kernel.org, linux-pci@vger.kernel.org,
        devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH 04/10] dt-bindings: PCI: qcom: Add SC8280XP to binding
Message-ID: <YsvvBHtQKzQD8sRE@hovoldconsulting.com>
References: <20220629141000.18111-1-johan+linaro@kernel.org>
 <20220629141000.18111-5-johan+linaro@kernel.org>
 <20220709080053.GK5063@thinkpad>
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On Sat, Jul 09, 2022 at 01:30:53PM +0530, Manivannan Sadhasivam wrote:
> On Wed, Jun 29, 2022 at 04:09:54PM +0200, Johan Hovold wrote:
> > Add the SC8280XP platform to the binding.
> > 
> > SC8280XP use four host interrupts for MSI routing so remove the obsolete
> > comment referring to newer chipsets supporting one or eight interrupts
> > (e.g. for backwards compatibility).
> > 
> > Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
> 
> Wondering why 4 on this SoC. Is this what added in downstream or you also
> verified it with IP documentation.

I don't have direct access to the IP docs, but I've verified it with
people who do.

Johan