From: Lorenzo Pieralisi <lpieralisi@kernel.org>
To: Mark Rutland <mark.rutland@arm.com>
Cc: Marc Zyngier <maz@kernel.org>,
Thomas Gleixner <tglx@linutronix.de>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will@kernel.org>,
Sascha Bischoff <sascha.bischoff@arm.com>,
Timothy Hayes <timothy.hayes@arm.com>,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, devicetree@vger.kernel.org
Subject: Re: [PATCH 16/24] arm64: cpucaps: Add GCIE capability
Date: Tue, 8 Apr 2025 17:02:53 +0200 [thread overview]
Message-ID: <Z/U6nVugAnrE2I7e@lpieralisi> (raw)
In-Reply-To: <Z_UH0808dGkS3v7-@J2N7QTR9R3.cambridge.arm.com>
On Tue, Apr 08, 2025 at 12:26:11PM +0100, Mark Rutland wrote:
> On Tue, Apr 08, 2025 at 12:50:15PM +0200, Lorenzo Pieralisi wrote:
> > Implement the GCIE capability as a strict boot cpu capability to
> > detect whether architectural GICv5 support is available in HW.
> >
> > Signed-off-by: Lorenzo Pieralisi <lpieralisi@kernel.org>
> > Cc: Will Deacon <will@kernel.org>
> > Cc: Catalin Marinas <catalin.marinas@arm.com>
> > Cc: Marc Zyngier <maz@kernel.org>
>
> This looks good; I have a minor consistency/bikeshedding concern below.
>
> > ---
> > arch/arm64/kernel/cpufeature.c | 7 +++++++
> > arch/arm64/tools/cpucaps | 1 +
> > 2 files changed, 8 insertions(+)
> >
> > diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c
> > index 9c4d6d552b25cb3a31d1fb267bd73d3f82513e69..8c60591633f3d435ad9b80a10e484f26af328964 100644
> > --- a/arch/arm64/kernel/cpufeature.c
> > +++ b/arch/arm64/kernel/cpufeature.c
> > @@ -3041,6 +3041,13 @@ static const struct arm64_cpu_capabilities arm64_features[] = {
> > .matches = has_pmuv3,
> > },
> > #endif
> > + {
> > + .desc = "GCIE",
> > + .type = ARM64_CPUCAP_STRICT_BOOT_CPU_FEATURE,
> > + .capability = ARM64_HAS_GCIE,
> > + .matches = has_cpuid_feature,
> > + ARM64_CPUID_FIELDS(ID_AA64PFR2_EL1, GCIE, IMP)
> > + },
>
> I reckon it's worth making the desc a bit clearer, e.g. "GICv5 CPU
> interface".
>
> It might be worth cleaning up the existing ARM64_HAS_GIC_CPUIF_SYSREGS
> feature, e.g. making that have "GICv3 CPU interface" as its desc.
>
> Likewise, could make the names consistent, e.g. have:
>
> ARM64_HAS_GICV3_CPUIF
> ARM64_HAS_GICV5_CPUIF
>
> ... ?
This makes sense to me, I will do it in preparation for v2.
Thanks,
Lorenzo
next prev parent reply other threads:[~2025-04-08 15:02 UTC|newest]
Thread overview: 62+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-04-08 10:49 [PATCH 00/24] Arm GICv5: Host driver implementation Lorenzo Pieralisi
2025-04-08 10:50 ` [PATCH 01/24] Documentation: devicetree: bindings: Add GICv5 DT bindings Lorenzo Pieralisi
2025-04-08 12:26 ` Rob Herring (Arm)
2025-04-08 14:58 ` Lorenzo Pieralisi
2025-04-08 15:07 ` Rob Herring
2025-04-09 8:20 ` Lorenzo Pieralisi
2025-04-08 10:50 ` [PATCH 02/24] arm64/sysreg: Add GCIE field to ID_AA64PFR2_EL1 Lorenzo Pieralisi
2025-04-08 10:50 ` [PATCH 03/24] arm64/sysreg: Add ICC_PPI_PRIORITY<n>_EL1 Lorenzo Pieralisi
2025-04-08 10:50 ` [PATCH 04/24] arm64/sysreg: Add ICC_ICSR_EL1 Lorenzo Pieralisi
2025-04-08 10:50 ` [PATCH 05/24] arm64/sysreg: Add ICC_PPI_HMR<n>_EL1 Lorenzo Pieralisi
2025-04-08 10:50 ` [PATCH 06/24] arm64/sysreg: Add ICC_PPI_ENABLER<n>_EL1 Lorenzo Pieralisi
2025-04-08 10:50 ` [PATCH 07/24] arm64/sysreg: Add ICC_PPI_{C/S}ACTIVER<n>_EL1 Lorenzo Pieralisi
2025-04-08 10:50 ` [PATCH 08/24] arm64/sysreg: Add ICC_PPI_{C/S}PENDR<n>_EL1 Lorenzo Pieralisi
2025-04-08 10:50 ` [PATCH 09/24] arm64/sysreg: Add ICC_CR0_EL1 Lorenzo Pieralisi
2025-04-08 10:50 ` [PATCH 10/24] arm64/sysreg: Add ICC_PCR_EL1 Lorenzo Pieralisi
2025-04-08 10:50 ` [PATCH 11/24] arm64/sysreg: Add ICC_IDR0_EL1 Lorenzo Pieralisi
2025-04-08 10:50 ` [PATCH 12/24] arm64/sysreg: Add ICH_HFGRTR_EL2 Lorenzo Pieralisi
2025-04-08 10:50 ` [PATCH 13/24] arm64/sysreg: Add ICH_HFGWTR_EL2 Lorenzo Pieralisi
2025-04-09 7:48 ` Arnd Bergmann
2025-04-09 8:51 ` Lorenzo Pieralisi
2025-04-08 10:50 ` [PATCH 14/24] arm64/sysreg: Add ICH_HFGITR_EL2 Lorenzo Pieralisi
2025-04-08 10:50 ` [PATCH 15/24] arm64: Disable GICv5 read/write/instruction traps Lorenzo Pieralisi
2025-04-08 10:50 ` [PATCH 16/24] arm64: cpucaps: Add GCIE capability Lorenzo Pieralisi
2025-04-08 11:26 ` Mark Rutland
2025-04-08 15:02 ` Lorenzo Pieralisi [this message]
2025-04-08 10:50 ` [PATCH 17/24] arm64: smp: Support non-SGIs for IPIs Lorenzo Pieralisi
2025-04-08 10:50 ` [PATCH 18/24] irqchip/gic-v5: Add GICv5 PPI support Lorenzo Pieralisi
2025-04-08 21:42 ` Thomas Gleixner
2025-04-09 7:30 ` Lorenzo Pieralisi
2025-04-17 14:49 ` Lorenzo Pieralisi
2025-04-11 17:06 ` Lorenzo Pieralisi
2025-04-08 10:50 ` [PATCH 19/24] irqchip/gic-v5: Add GICv5 IRS/SPI support Lorenzo Pieralisi
2025-04-09 7:02 ` Thomas Gleixner
2025-04-09 7:40 ` Lorenzo Pieralisi
2025-04-08 10:50 ` [PATCH 20/24] irqchip/gic-v5: Add GICv5 LPI/IPI support Lorenzo Pieralisi
2025-04-09 8:23 ` Arnd Bergmann
2025-04-09 10:11 ` Lorenzo Pieralisi
2025-04-09 10:56 ` Arnd Bergmann
2025-04-09 13:15 ` Lorenzo Pieralisi
2025-04-09 14:25 ` Arnd Bergmann
2025-04-18 9:21 ` Lorenzo Pieralisi
2025-04-09 8:27 ` Thomas Gleixner
2025-04-09 10:30 ` Lorenzo Pieralisi
2025-04-11 9:26 ` Lorenzo Pieralisi
2025-04-11 9:55 ` Thomas Gleixner
2025-04-11 12:37 ` Lorenzo Pieralisi
2025-04-12 13:01 ` Liam R. Howlett
2025-04-14 8:26 ` Lorenzo Pieralisi
2025-04-14 14:37 ` Liam R. Howlett
2025-04-15 8:08 ` Lorenzo Pieralisi
2025-04-08 10:50 ` [PATCH 21/24] irqchip/gic-v5: Enable GICv5 SMP booting Lorenzo Pieralisi
2025-04-08 10:50 ` [PATCH 22/24] irqchip/gic-v5: Add GICv5 ITS support Lorenzo Pieralisi
2025-04-09 11:13 ` Thomas Gleixner
2025-04-09 13:37 ` Lorenzo Pieralisi
2025-04-09 18:57 ` Thomas Gleixner
2025-04-10 8:08 ` Lorenzo Pieralisi
2025-04-10 9:20 ` Thomas Gleixner
2025-04-08 10:50 ` [PATCH 23/24] irqchip/gic-v5: Add GICv5 IWB support Lorenzo Pieralisi
2025-04-08 10:50 ` [PATCH 24/24] arm64: Kconfig: Enable GICv5 Lorenzo Pieralisi
2025-04-09 13:44 ` kernel test robot
2025-04-09 14:04 ` Lorenzo Pieralisi
2025-04-09 14:07 ` Krzysztof Kozlowski
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