* [PATCH 1/5] ARM: dts: renesas: r9a06g032: Describe I2C controllers
2025-03-28 15:31 [PATCH 0/5] ARM: dts: renesas: r9a06g032-rzn1d400-db: enable I2C infrastructure Wolfram Sang
@ 2025-03-28 15:31 ` Wolfram Sang
2025-04-11 7:18 ` Geert Uytterhoeven
2025-03-28 15:31 ` [PATCH 2/5] ARM: dts: renesas: r9a06g032-rzn1d400-db: describe I2C bus Wolfram Sang
` (3 subsequent siblings)
4 siblings, 1 reply; 15+ messages in thread
From: Wolfram Sang @ 2025-03-28 15:31 UTC (permalink / raw)
To: linux-renesas-soc
Cc: Wolfram Sang, Geert Uytterhoeven, Magnus Damm, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, devicetree
To match the documentation and schematics, they are numbered from 1 and
not from 0.
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
---
arch/arm/boot/dts/renesas/r9a06g032.dtsi | 22 ++++++++++++++++++++++
1 file changed, 22 insertions(+)
diff --git a/arch/arm/boot/dts/renesas/r9a06g032.dtsi b/arch/arm/boot/dts/renesas/r9a06g032.dtsi
index 87e03446fb4d..5889d391b653 100644
--- a/arch/arm/boot/dts/renesas/r9a06g032.dtsi
+++ b/arch/arm/boot/dts/renesas/r9a06g032.dtsi
@@ -268,6 +268,28 @@ uart7: serial@50004000 {
status = "disabled";
};
+ i2c1: i2c@40063000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "renesas,r9a06g032-i2c", "renesas,rzn1-i2c", "snps,designware-i2c";
+ reg = <0x40063000 0x100>;
+ interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&sysctrl R9A06G032_HCLK_I2C0>, <&sysctrl R9A06G032_CLK_I2C0>;
+ clock-names = "ref", "pclk";
+ status = "disabled";
+ };
+
+ i2c2: i2c@40064000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "renesas,r9a06g032-i2c", "renesas,rzn1-i2c", "snps,designware-i2c";
+ reg = <0x40064000 0x100>;
+ interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&sysctrl R9A06G032_HCLK_I2C1>, <&sysctrl R9A06G032_CLK_I2C1>;
+ clock-names = "ref", "pclk";
+ status = "disabled";
+ };
+
pinctrl: pinctrl@40067000 {
compatible = "renesas,r9a06g032-pinctrl", "renesas,rzn1-pinctrl";
reg = <0x40067000 0x1000>, <0x51000000 0x480>;
--
2.47.2
^ permalink raw reply related [flat|nested] 15+ messages in thread* Re: [PATCH 1/5] ARM: dts: renesas: r9a06g032: Describe I2C controllers
2025-03-28 15:31 ` [PATCH 1/5] ARM: dts: renesas: r9a06g032: Describe I2C controllers Wolfram Sang
@ 2025-04-11 7:18 ` Geert Uytterhoeven
0 siblings, 0 replies; 15+ messages in thread
From: Geert Uytterhoeven @ 2025-04-11 7:18 UTC (permalink / raw)
To: Wolfram Sang
Cc: linux-renesas-soc, Geert Uytterhoeven, Magnus Damm, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, devicetree
Hi Wolfram,
On Fri, 28 Mar 2025 at 16:33, Wolfram Sang
<wsa+renesas@sang-engineering.com> wrote:
> To match the documentation and schematics, they are numbered from 1 and
> not from 0.
>
> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Thanks for your patch!
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
i.e. will queue in renesas-devel for v6.16.
> --- a/arch/arm/boot/dts/renesas/r9a06g032.dtsi
> +++ b/arch/arm/boot/dts/renesas/r9a06g032.dtsi
> @@ -268,6 +268,28 @@ uart7: serial@50004000 {
> status = "disabled";
> };
>
> + i2c1: i2c@40063000 {
> + #address-cells = <1>;
> + #size-cells = <0>;
I will move these below while applying, as per
Documentation/devicetree/bindings/dts-coding-style.rst.
> + compatible = "renesas,r9a06g032-i2c", "renesas,rzn1-i2c", "snps,designware-i2c";
> + reg = <0x40063000 0x100>;
> + interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&sysctrl R9A06G032_HCLK_I2C0>, <&sysctrl R9A06G032_CLK_I2C0>;
> + clock-names = "ref", "pclk";
> + status = "disabled";
> + };
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 15+ messages in thread
* [PATCH 2/5] ARM: dts: renesas: r9a06g032-rzn1d400-db: describe I2C bus
2025-03-28 15:31 [PATCH 0/5] ARM: dts: renesas: r9a06g032-rzn1d400-db: enable I2C infrastructure Wolfram Sang
2025-03-28 15:31 ` [PATCH 1/5] ARM: dts: renesas: r9a06g032: Describe I2C controllers Wolfram Sang
@ 2025-03-28 15:31 ` Wolfram Sang
2025-03-29 9:13 ` Sergey Shtylyov
2025-04-11 7:35 ` Geert Uytterhoeven
2025-03-28 15:31 ` [PATCH 3/5] ARM: dts: renesas: r9a06g032-rzn1d400-eb: " Wolfram Sang
` (2 subsequent siblings)
4 siblings, 2 replies; 15+ messages in thread
From: Wolfram Sang @ 2025-03-28 15:31 UTC (permalink / raw)
To: linux-renesas-soc
Cc: Wolfram Sang, Geert Uytterhoeven, Magnus Damm, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, devicetree
Schematics mention a 24cs64 on the bus, but I definitely have only a
24c64. So, it is only mentioned as a comment.
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
---
.../dts/renesas/r9a06g032-rzn1d400-db.dts | 44 +++++++++++++++++++
1 file changed, 44 insertions(+)
diff --git a/arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-db.dts b/arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-db.dts
index 31cdca3e623c..d50a1d91e968 100644
--- a/arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-db.dts
+++ b/arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-db.dts
@@ -57,6 +57,44 @@ fixed-link {
};
};
+&i2c2 {
+ pinctrl-0 = <&pins_i2c2>;
+ pinctrl-names = "default";
+ status = "okay";
+ clock-frequency = <400000>;
+
+ pca9698: gpio@20 {
+ compatible = "nxp,pca9698";
+ reg = <0x20>;
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ /* configure the analog switch to let i2c2 access the eeprom */
+ max4662-in1-hog {
+ gpio-hog;
+ gpios = <16 0>;
+ output-high;
+ };
+ max4662-in2-hog {
+ gpio-hog;
+ gpios = <17 0>;
+ output-low;
+ };
+ max4662-in3-hog {
+ gpio-hog;
+ gpios = <18 0>;
+ output-low;
+ };
+ };
+
+ /* Some revisions may have a 24cs64 at address 0x58 */
+ eeprom@50 {
+ compatible = "atmel,24c64";
+ pagesize = <32>;
+ reg = <0x50>;
+ };
+};
+
&mii_conv4 {
renesas,miic-input = <MIIC_SWITCH_PORTB>;
status = "okay";
@@ -114,6 +152,12 @@ pins_eth4: pins_eth4 {
bias-disable;
};
+ pins_i2c2: pins_i2c2 {
+ pinmux = <RZN1_PINMUX(115, RZN1_FUNC_I2C)>,
+ <RZN1_PINMUX(116, RZN1_FUNC_I2C)>;
+ drive-strength = <12>;
+ };
+
pins_mdio1: pins_mdio1 {
pinmux = <RZN1_PINMUX(152, RZN1_FUNC_MDIO1_SWITCH)>,
<RZN1_PINMUX(153, RZN1_FUNC_MDIO1_SWITCH)>;
--
2.47.2
^ permalink raw reply related [flat|nested] 15+ messages in thread* Re: [PATCH 2/5] ARM: dts: renesas: r9a06g032-rzn1d400-db: describe I2C bus
2025-03-28 15:31 ` [PATCH 2/5] ARM: dts: renesas: r9a06g032-rzn1d400-db: describe I2C bus Wolfram Sang
@ 2025-03-29 9:13 ` Sergey Shtylyov
2025-03-29 9:37 ` Wolfram Sang
2025-04-11 7:35 ` Geert Uytterhoeven
1 sibling, 1 reply; 15+ messages in thread
From: Sergey Shtylyov @ 2025-03-29 9:13 UTC (permalink / raw)
To: Wolfram Sang, linux-renesas-soc
Cc: Geert Uytterhoeven, Magnus Damm, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, devicetree
On 3/28/25 6:31 PM, Wolfram Sang wrote:
> Schematics mention a 24cs64 on the bus, but I definitely have only a
> 24c64. So, it is only mentioned as a comment.
>
> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
> ---
> .../dts/renesas/r9a06g032-rzn1d400-db.dts | 44 +++++++++++++++++++
> 1 file changed, 44 insertions(+)
>
> diff --git a/arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-db.dts b/arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-db.dts
> index 31cdca3e623c..d50a1d91e968 100644
> --- a/arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-db.dts
> +++ b/arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-db.dts
> @@ -57,6 +57,44 @@ fixed-link {
> };
> };
>
> +&i2c2 {
> + pinctrl-0 = <&pins_i2c2>;
> + pinctrl-names = "default";
> + status = "okay";
> + clock-frequency = <400000>;
[...]> + /* Some revisions may have a 24cs64 at address 0x58 */
> + eeprom@50 {
So 0x58 or 0x50?
> + compatible = "atmel,24c64";
> + pagesize = <32>;
> + reg = <0x50>;
> + };
> +};
> +
> &mii_conv4 {
> renesas,miic-input = <MIIC_SWITCH_PORTB>;
> status = "okay";
[...]
MBR, Sergey
^ permalink raw reply [flat|nested] 15+ messages in thread* Re: [PATCH 2/5] ARM: dts: renesas: r9a06g032-rzn1d400-db: describe I2C bus
2025-03-29 9:13 ` Sergey Shtylyov
@ 2025-03-29 9:37 ` Wolfram Sang
0 siblings, 0 replies; 15+ messages in thread
From: Wolfram Sang @ 2025-03-29 9:37 UTC (permalink / raw)
To: Sergey Shtylyov
Cc: linux-renesas-soc, Geert Uytterhoeven, Magnus Damm, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, devicetree
[-- Attachment #1: Type: text/plain, Size: 264 bytes --]
> [...]> + /* Some revisions may have a 24cs64 at address 0x58 */
> > + eeprom@50 {
>
> So 0x58 or 0x50?
The eeprom is at 0x50, always. The serial ID (the cs-part) is at 0x58.
This is always the case for cs-eeproms, see their existing usage in DT.
[-- Attachment #2: signature.asc --]
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^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH 2/5] ARM: dts: renesas: r9a06g032-rzn1d400-db: describe I2C bus
2025-03-28 15:31 ` [PATCH 2/5] ARM: dts: renesas: r9a06g032-rzn1d400-db: describe I2C bus Wolfram Sang
2025-03-29 9:13 ` Sergey Shtylyov
@ 2025-04-11 7:35 ` Geert Uytterhoeven
1 sibling, 0 replies; 15+ messages in thread
From: Geert Uytterhoeven @ 2025-04-11 7:35 UTC (permalink / raw)
To: Wolfram Sang
Cc: linux-renesas-soc, Magnus Damm, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, devicetree
On Fri, 28 Mar 2025 at 16:33, Wolfram Sang
<wsa+renesas@sang-engineering.com> wrote:
> Schematics mention a 24cs64 on the bus, but I definitely have only a
> 24c64. So, it is only mentioned as a comment.
>
> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
i.e. will queue in renesas-devel for v6.16.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 15+ messages in thread
* [PATCH 3/5] ARM: dts: renesas: r9a06g032-rzn1d400-eb: describe I2C bus
2025-03-28 15:31 [PATCH 0/5] ARM: dts: renesas: r9a06g032-rzn1d400-db: enable I2C infrastructure Wolfram Sang
2025-03-28 15:31 ` [PATCH 1/5] ARM: dts: renesas: r9a06g032: Describe I2C controllers Wolfram Sang
2025-03-28 15:31 ` [PATCH 2/5] ARM: dts: renesas: r9a06g032-rzn1d400-db: describe I2C bus Wolfram Sang
@ 2025-03-28 15:31 ` Wolfram Sang
2025-04-11 9:22 ` Geert Uytterhoeven
2025-03-28 15:31 ` [PATCH 4/5] ARM: dts: renesas: r9a06g032-rzn1d400-db: describe LEDs Wolfram Sang
2025-03-28 15:31 ` [PATCH 5/5] ARM: dts: renesas: r9a06g032-rzn1d400-db: describe keys Wolfram Sang
4 siblings, 1 reply; 15+ messages in thread
From: Wolfram Sang @ 2025-03-28 15:31 UTC (permalink / raw)
To: linux-renesas-soc
Cc: Wolfram Sang, Geert Uytterhoeven, Magnus Damm, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, devicetree
The actual sensor might differ, but all known are LM75B compatible.
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
---
arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-eb.dts | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-eb.dts b/arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-eb.dts
index 1aac06b0e423..56da1d5fd5f4 100644
--- a/arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-eb.dts
+++ b/arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-eb.dts
@@ -14,6 +14,14 @@ / {
"renesas,r9a06g032";
};
+&i2c2 {
+ /* Sensors are different across revisions. All are LM75B compatible */
+ sensor@49 {
+ compatible = "national,lm75b";
+ reg = <0x49>;
+ };
+};
+
&mii_conv2 {
renesas,miic-input = <MIIC_SWITCH_PORTD>;
status = "okay";
--
2.47.2
^ permalink raw reply related [flat|nested] 15+ messages in thread* Re: [PATCH 3/5] ARM: dts: renesas: r9a06g032-rzn1d400-eb: describe I2C bus
2025-03-28 15:31 ` [PATCH 3/5] ARM: dts: renesas: r9a06g032-rzn1d400-eb: " Wolfram Sang
@ 2025-04-11 9:22 ` Geert Uytterhoeven
0 siblings, 0 replies; 15+ messages in thread
From: Geert Uytterhoeven @ 2025-04-11 9:22 UTC (permalink / raw)
To: Wolfram Sang
Cc: linux-renesas-soc, Magnus Damm, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, devicetree
On Fri, 28 Mar 2025 at 16:33, Wolfram Sang
<wsa+renesas@sang-engineering.com> wrote:
> The actual sensor might differ, but all known are LM75B compatible.
>
> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 15+ messages in thread
* [PATCH 4/5] ARM: dts: renesas: r9a06g032-rzn1d400-db: describe LEDs
2025-03-28 15:31 [PATCH 0/5] ARM: dts: renesas: r9a06g032-rzn1d400-db: enable I2C infrastructure Wolfram Sang
` (2 preceding siblings ...)
2025-03-28 15:31 ` [PATCH 3/5] ARM: dts: renesas: r9a06g032-rzn1d400-eb: " Wolfram Sang
@ 2025-03-28 15:31 ` Wolfram Sang
2025-04-11 8:59 ` Geert Uytterhoeven
2025-03-28 15:31 ` [PATCH 5/5] ARM: dts: renesas: r9a06g032-rzn1d400-db: describe keys Wolfram Sang
4 siblings, 1 reply; 15+ messages in thread
From: Wolfram Sang @ 2025-03-28 15:31 UTC (permalink / raw)
To: linux-renesas-soc
Cc: Wolfram Sang, Geert Uytterhoeven, Magnus Damm, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, devicetree
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
---
.../dts/renesas/r9a06g032-rzn1d400-db.dts | 37 +++++++++++++++++++
1 file changed, 37 insertions(+)
diff --git a/arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-db.dts b/arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-db.dts
index d50a1d91e968..ccd47f0181b4 100644
--- a/arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-db.dts
+++ b/arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-db.dts
@@ -8,6 +8,7 @@
/dts-v1/;
+#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/rzn1-pinctrl.h>
#include <dt-bindings/net/pcs-rzn1-miic.h>
@@ -24,6 +25,42 @@ chosen {
aliases {
serial0 = &uart0;
};
+
+ leds {
+ compatible = "gpio-leds";
+
+ led-pca0 {
+ gpios = <&pca9698 0 GPIO_ACTIVE_HIGH>;
+ };
+
+ led-pca1 {
+ gpios = <&pca9698 1 GPIO_ACTIVE_HIGH>;
+ };
+
+ led-pca2 {
+ gpios = <&pca9698 2 GPIO_ACTIVE_HIGH>;
+ };
+
+ led-pca3 {
+ gpios = <&pca9698 3 GPIO_ACTIVE_HIGH>;
+ };
+
+ led-pca4 {
+ gpios = <&pca9698 4 GPIO_ACTIVE_HIGH>;
+ };
+
+ led-pca5 {
+ gpios = <&pca9698 5 GPIO_ACTIVE_HIGH>;
+ };
+
+ led-pca6 {
+ gpios = <&pca9698 6 GPIO_ACTIVE_HIGH>;
+ };
+
+ led-pca7 {
+ gpios = <&pca9698 7 GPIO_ACTIVE_HIGH>;
+ };
+ };
};
&can0 {
--
2.47.2
^ permalink raw reply related [flat|nested] 15+ messages in thread* Re: [PATCH 4/5] ARM: dts: renesas: r9a06g032-rzn1d400-db: describe LEDs
2025-03-28 15:31 ` [PATCH 4/5] ARM: dts: renesas: r9a06g032-rzn1d400-db: describe LEDs Wolfram Sang
@ 2025-04-11 8:59 ` Geert Uytterhoeven
2025-04-11 11:40 ` Wolfram Sang
0 siblings, 1 reply; 15+ messages in thread
From: Geert Uytterhoeven @ 2025-04-11 8:59 UTC (permalink / raw)
To: Wolfram Sang
Cc: linux-renesas-soc, Magnus Damm, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, devicetree
Hi Wolfram,
On Fri, 28 Mar 2025 at 16:33, Wolfram Sang
<wsa+renesas@sang-engineering.com> wrote:
> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Thanks for your patch!
> --- a/arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-db.dts
> +++ b/arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-db.dts
> @@ -24,6 +25,42 @@ chosen {
> aliases {
> serial0 = &uart0;
> };
> +
> + leds {
> + compatible = "gpio-leds";
> +
> + led-pca0 {
These are called LED1-LED8 in the Board Setup Notes.
> + gpios = <&pca9698 0 GPIO_ACTIVE_HIGH>;
> + };
Missing:
color = <LED_COLOR_ID_ORANGE>;
function = LED_FUNCTION_INDICATOR;
Perhaps you want the first one to be a heartbeat?
linux,default-trigger = "heartbeat";
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 15+ messages in thread* Re: [PATCH 4/5] ARM: dts: renesas: r9a06g032-rzn1d400-db: describe LEDs
2025-04-11 8:59 ` Geert Uytterhoeven
@ 2025-04-11 11:40 ` Wolfram Sang
2025-04-14 13:41 ` Geert Uytterhoeven
0 siblings, 1 reply; 15+ messages in thread
From: Wolfram Sang @ 2025-04-11 11:40 UTC (permalink / raw)
To: Geert Uytterhoeven
Cc: linux-renesas-soc, Magnus Damm, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, devicetree
[-- Attachment #1: Type: text/plain, Size: 850 bytes --]
> These are called LED1-LED8 in the Board Setup Notes.
Oh, where? I have a version from "Dec 14, 2020" which only calls them
Software-LEDs or "Port0 BitX". Schematics call them DBG_LEDx. I don't
care much. The "db" board has a "USER LED2", as long as we don't
conflict with that name, I am fine.
> color = <LED_COLOR_ID_ORANGE>;
Hmmm, they are definitely GREEN here.
> function = LED_FUNCTION_INDICATOR;
LED_FUNCTION_PROGRAMMING?
> Perhaps you want the first one to be a heartbeat?
>
> linux,default-trigger = "heartbeat";
I recently removed a default-trigger on another board because it was in
the way. So, I'd rather not.
Phew, starting with the PHY LEDs on this board, didn't know LED were so
troublesome...
Shall I resend only this patch and rebased on the keyboard patch? Or
resend the both?
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^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH 4/5] ARM: dts: renesas: r9a06g032-rzn1d400-db: describe LEDs
2025-04-11 11:40 ` Wolfram Sang
@ 2025-04-14 13:41 ` Geert Uytterhoeven
0 siblings, 0 replies; 15+ messages in thread
From: Geert Uytterhoeven @ 2025-04-14 13:41 UTC (permalink / raw)
To: Wolfram Sang
Cc: linux-renesas-soc, Magnus Damm, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, devicetree
Hi Wolfram,
On Fri, 11 Apr 2025 at 13:40, Wolfram Sang
<wsa+renesas@sang-engineering.com> wrote:
> > These are called LED1-LED8 in the Board Setup Notes.
>
> Oh, where? I have a version from "Dec 14, 2020" which only calls them
> Software-LEDs or "Port0 BitX". Schematics call them DBG_LEDx. I don't
> care much. The "db" board has a "USER LED2", as long as we don't
> conflict with that name, I am fine.
>
> > color = <LED_COLOR_ID_ORANGE>;
>
> Hmmm, they are definitely GREEN here.
>
> > function = LED_FUNCTION_INDICATOR;
>
> LED_FUNCTION_PROGRAMMING?
>
> > Perhaps you want the first one to be a heartbeat?
> >
> > linux,default-trigger = "heartbeat";
>
> I recently removed a default-trigger on another board because it was in
> the way. So, I'd rather not.
>
> Phew, starting with the PHY LEDs on this board, didn't know LED were so
> troublesome...
>
> Shall I resend only this patch and rebased on the keyboard patch? Or
> resend the both?
Please just resend a new version of this patch.
I have applied all your other RZ/N1 patches that arrived before the
weekend. Please check renesas-next or -devel.
Thanks!
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 15+ messages in thread
* [PATCH 5/5] ARM: dts: renesas: r9a06g032-rzn1d400-db: describe keys
2025-03-28 15:31 [PATCH 0/5] ARM: dts: renesas: r9a06g032-rzn1d400-db: enable I2C infrastructure Wolfram Sang
` (3 preceding siblings ...)
2025-03-28 15:31 ` [PATCH 4/5] ARM: dts: renesas: r9a06g032-rzn1d400-db: describe LEDs Wolfram Sang
@ 2025-03-28 15:31 ` Wolfram Sang
2025-04-11 9:02 ` Geert Uytterhoeven
4 siblings, 1 reply; 15+ messages in thread
From: Wolfram Sang @ 2025-03-28 15:31 UTC (permalink / raw)
To: linux-renesas-soc
Cc: Wolfram Sang, Geert Uytterhoeven, Magnus Damm, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, devicetree
The keys are connected to the I2C GPIO extender which has the interrupt
pin not connected. So, we need to poll.
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
---
.../dts/renesas/r9a06g032-rzn1d400-db.dts | 63 +++++++++++++++++++
1 file changed, 63 insertions(+)
diff --git a/arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-db.dts b/arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-db.dts
index ccd47f0181b4..54be87d387f7 100644
--- a/arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-db.dts
+++ b/arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-db.dts
@@ -9,6 +9,7 @@
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
#include <dt-bindings/pinctrl/rzn1-pinctrl.h>
#include <dt-bindings/net/pcs-rzn1-miic.h>
@@ -26,6 +27,68 @@ aliases {
serial0 = &uart0;
};
+ keyboard {
+ compatible = "gpio-keys-polled";
+ poll-interval = <100>;
+
+ switch-1 {
+ linux,code = <KEY_1>;
+ label = "SW1-1";
+ debounce-interval = <20>;
+ gpios = <&pca9698 8 GPIO_ACTIVE_LOW>;
+ };
+
+ switch-2 {
+ linux,code = <KEY_2>;
+ label = "SW1-2";
+ debounce-interval = <20>;
+ gpios = <&pca9698 9 GPIO_ACTIVE_LOW>;
+ };
+
+ switch-3 {
+ linux,code = <KEY_3>;
+ label = "SW1-3";
+ debounce-interval = <20>;
+ gpios = <&pca9698 10 GPIO_ACTIVE_LOW>;
+ };
+
+ switch-4 {
+ linux,code = <KEY_4>;
+ label = "SW1-4";
+ debounce-interval = <20>;
+ gpios = <&pca9698 11 GPIO_ACTIVE_LOW>;
+ };
+
+ switch-5 {
+ linux,code = <KEY_5>;
+ label = "SW1-5";
+ debounce-interval = <20>;
+ gpios = <&pca9698 12 GPIO_ACTIVE_LOW>;
+ };
+
+ switch-6 {
+ linux,code = <KEY_6>;
+ label = "SW1-6";
+ debounce-interval = <20>;
+ gpios = <&pca9698 13 GPIO_ACTIVE_LOW>;
+ };
+
+ switch-7 {
+ linux,code = <KEY_7>;
+ label = "SW1-7";
+ debounce-interval = <20>;
+ gpios = <&pca9698 14 GPIO_ACTIVE_LOW>;
+ };
+
+ switch-8 {
+ linux,code = <KEY_8>;
+ label = "SW1-8";
+ debounce-interval = <20>;
+ gpios = <&pca9698 15 GPIO_ACTIVE_LOW>;
+ };
+
+ };
+
leds {
compatible = "gpio-leds";
--
2.47.2
^ permalink raw reply related [flat|nested] 15+ messages in thread* Re: [PATCH 5/5] ARM: dts: renesas: r9a06g032-rzn1d400-db: describe keys
2025-03-28 15:31 ` [PATCH 5/5] ARM: dts: renesas: r9a06g032-rzn1d400-db: describe keys Wolfram Sang
@ 2025-04-11 9:02 ` Geert Uytterhoeven
0 siblings, 0 replies; 15+ messages in thread
From: Geert Uytterhoeven @ 2025-04-11 9:02 UTC (permalink / raw)
To: Wolfram Sang
Cc: linux-renesas-soc, Magnus Damm, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, devicetree
On Fri, 28 Mar 2025 at 16:33, Wolfram Sang
<wsa+renesas@sang-engineering.com> wrote:
> The keys are connected to the I2C GPIO extender which has the interrupt
> pin not connected. So, we need to poll.
>
> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
i.e. will queue in renesas-devel for v6.16.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 15+ messages in thread