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s=mail; t=1732703853; bh=EwkTX+MIFpLy9bn5raEc+I7FYh+YTAy5cL29F6FwZ48=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=Dp4UrgW77o9Ymd6bTjpRfztdQI5YoI8Jx6G+IprE8QppyWLBTchlw/HqDcCAFrY3c ZULd2sM/4mo0pFNtm3Fw5vaHW8akqi0gF2hIUGXAmoL5g0LdqHP2vS0NH0oypcswZa eLMteRDH7RCZA/1zTjKf4MHS9hi5kjjXZ4qZndXUvFRCkTyHxZvByw4ji8yACxopJo fQJYSiUZJtdrRogf6ch9w7eyyJFOoqd0Bo3nWn5BtxhB75MqagIKYFMmSvBLPQclI/ UWNGvwbQXo+lXFGlwjVhdnfBLF1zRWmrq510Y8qelZp7Ofn/H+h8dB8SxRUeWrnd0J dFqueXyjg70eg== Date: Wed, 27 Nov 2024 10:37:20 +0000 From: Haylen Chu To: Krzysztof Kozlowski , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Haylen Chu Cc: linux-riscv@lists.infradead.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Inochi Amaoto , Chen Wang , Jisheng Zhang Subject: Re: [PATCH v3 1/3] dt-bindings: clock: spacemit: Add clock controllers of Spacemit K1 SoC Message-ID: References: <20241126143125.9980-2-heylenay@4d2.org> <20241126143125.9980-3-heylenay@4d2.org> <64bf96a3-e28c-4c47-b7b3-e227bbaa7aee@kernel.org> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: On Wed, Nov 27, 2024 at 09:03:11AM +0100, Krzysztof Kozlowski wrote: > On Tue, Nov 26, 2024 at 03:48:33PM +0100, Krzysztof Kozlowski wrote: > > On 26/11/2024 15:31, Haylen Chu wrote: > > > + > > > +properties: > > > + compatible: > > > + enum: > > > + - spacemit,k1-ccu-apbs > > > + - spacemit,k1-ccu-mpmu > > > + - spacemit,k1-ccu-apbc > > > + - spacemit,k1-ccu-apmu > > > + > > > + clocks: > > > + maxItems: 4 > > > + > > > + clock-names: > > > + items: > > > + - const: osc_32k > > > > osc > > > > > + - const: vctcxo_1m > > > + - const: vctcxo_3m > > > + - const: vctcxo_24m > > > + > > > + spacemit,mpmu: > > > + $ref: /schemas/types.yaml#/definitions/phandle > > > + description: > > > + Phandle to the syscon managing "Main PMU (MPMU)" registers. It is used to > > > + check PLL lock status. > > > > Why your example does not have it? Example code is supposed to be complete. > > I think I understand why - this is for only one variant? Yes, currently all implemented PLLs are located at APBS region, thus this property is only meaningful in spacemit,k1-ccu-apbs. > But then this > should be disallowed in your binding for others. Currently your binding > says that it is required for one and allowed for others. Thanks for the correction. I'm considering moving the definition of spacemit,mpmu to the if block as well. Is it the correct way to disallow its usage in other variants? > > Best regards, > Krzysztof Thanks, Haylen Chu