Re: [PATCH v2 1/2] arm64: dts: qcom: x1e78100-t14s: Enable support for both Type-A USB ports

[Johan Hovold <johan@kernel.org>]

On Wed, Dec 04, 2024 at 10:56:59AM +0200, Abel Vesa wrote:
> On 24-12-02 16:18:37, Johan Hovold wrote:
> > On Mon, Dec 02, 2024 at 11:23:17AM +0200, Abel Vesa wrote:

> > > +&i2c5 {
> > > +	clock-frequency = <400000>;
> > > +
> > > +	status = "okay";
> > > +
> > > +	eusb3_repeater: redriver@47 {
> > > +		compatible = "nxp,ptn3222";
> > > +		reg = <0x47>;
> > 
> > The driver doesn't seem to actually communicate with these devices
> > currently and the addresses you specify here do not match what the
> > schematics says.
> 
> Schematics have the addressess left shifted for the wr/rd bit.
> 
> > Have you verified that these addresses are correct?
> 
> Reading the chip id regs confirms the addresses are correct.

Thanks for confirming.

> > And last, but not least, the T14s may hard reset if you disconnect a
> > thumb drive connected to one of these ports while suspended (6.13-rc1).
> 
> Wasn't able to reproduce this issue yet. Will spend some more time on it
> in the following days.

Just triggered what appears to be a deadlock in the block layer by
disconnecting a thumb drive while suspended. Not sure if that could
have triggered the reset, but it is likely related to the lockdep splat
I mentioned below.

> > Once it survived with a lockdep splat indicating a circular locking
> > dependency. I see that on the CRD as well, so possibly not related to
> > the hard reset.
> 
> This is most definitely the same splat triggered by the repeater PHY ops
> being called from the eUSB2 PHY driver. We are already in discussion
> with Vinod on how to handle multi PHY levels in the generic framework.

No, if it was the false-positive PHY splat I would have said so. This
appears to be a new block-layer splat with 6.13-rc1. Don't see it with
6.12.

I'll send a report.

Johan