public inbox for devicetree@vger.kernel.org
 help / color / mirror / Atom feed
From: Richard Acayan <mailingradian@gmail.com>
To: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
Cc: Bjorn Andersson <andersson@kernel.org>,
	Michael Turquette <mturquette@baylibre.com>,
	Stephen Boyd <sboyd@kernel.org>, Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Robert Foss <rfoss@kernel.org>, Todor Tomov <todor.too@gmail.com>,
	Bryan O'Donoghue <bryan.odonoghue@linaro.org>,
	Mauro Carvalho Chehab <mchehab@kernel.org>,
	Konrad Dybcio <konradybcio@kernel.org>,
	linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org,
	devicetree@vger.kernel.org, linux-media@vger.kernel.org
Subject: Re: [PATCH v8 5/5] arm64: dts: qcom: sdm670: add camss and cci
Date: Tue, 17 Dec 2024 18:06:24 -0500	[thread overview]
Message-ID: <Z2ID8BrR9f38iy3s@radian> (raw)
In-Reply-To: <e9dc1a6f-156b-40aa-9209-2010464d54ed@linaro.org>

On Tue, Dec 17, 2024 at 11:34:20PM +0200, Vladimir Zapolskiy wrote:
> On 12/17/24 22:25, Richard Acayan wrote:
> > On Tue, Dec 17, 2024 at 09:31:50AM +0200, Vladimir Zapolskiy wrote:
> > > Hi Richard.
> > > 
> > > On 12/17/24 00:30, Richard Acayan wrote:
> > > > Add the camera subsystem and CCI used to interface with cameras on the
> > > > Snapdragon 670.
> > > > 
> > > > Signed-off-by: Richard Acayan <mailingradian@gmail.com>
> > > > Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
> > > > ---
> > > >    arch/arm64/boot/dts/qcom/sdm670.dtsi | 185 +++++++++++++++++++++++++++
> > > >    1 file changed, 185 insertions(+)
> > > > 
> > > > diff --git a/arch/arm64/boot/dts/qcom/sdm670.dtsi b/arch/arm64/boot/dts/qcom/sdm670.dtsi
> > > > index 328096b91126..d4e1251ada04 100644
> > > > --- a/arch/arm64/boot/dts/qcom/sdm670.dtsi
> > > > +++ b/arch/arm64/boot/dts/qcom/sdm670.dtsi
> > > > @@ -6,6 +6,7 @@
> > > >     * Copyright (c) 2022, Richard Acayan. All rights reserved.
> > > >     */
> > > > +#include <dt-bindings/clock/qcom,camcc-sdm845.h>
> > > >    #include <dt-bindings/clock/qcom,dispcc-sdm845.h>
> > > >    #include <dt-bindings/clock/qcom,gcc-sdm845.h>
> > > >    #include <dt-bindings/clock/qcom,rpmh.h>
> > > > @@ -1168,6 +1169,34 @@ tlmm: pinctrl@3400000 {
> > > >    			gpio-ranges = <&tlmm 0 0 151>;
> > > >    			wakeup-parent = <&pdc>;
> > > > +			cci0_default: cci0-default-state {
> > > > +				pins = "gpio17", "gpio18";
> > > > +				function = "cci_i2c";
> > > > +				drive-strength = <2>;
> > > > +				bias-pull-up;
> > > > +			};
> > > > +
> > > > +			cci0_sleep: cci0-sleep-state {
> > > > +				pins = "gpio17", "gpio18";
> > > > +				function = "cci_i2c";
> > > > +				drive-strength = <2>;
> > > > +				bias-pull-down;
> > > > +			};
> > > > +
> > > > +			cci1_default: cci1-default-state {
> > > > +				pins = "gpio19", "gpio20";
> > > > +				function = "cci_i2c";
> > > > +				drive-strength = <2>;
> > > > +				bias-pull-up;
> > > > +			};
> > > > +
> > > > +			cci1_sleep: cci1-sleep-state {
> > > > +				pins = "gpio19", "gpio20";
> > > > +				function = "cci_i2c";
> > > > +				drive-strength = <2>;
> > > > +				bias-pull-down;
> > > > +			};
> > > > +
> > > >    			qup_i2c0_default: qup-i2c0-default-state {
> > > >    				pins = "gpio0", "gpio1";
> > > >    				function = "qup0";
> > > > @@ -1400,6 +1429,162 @@ spmi_bus: spmi@c440000 {
> > > >    			#interrupt-cells = <4>;
> > > >    		};
> > > > +		cci: cci@ac4a000 {
> > > > +			compatible = "qcom,sdm670-cci", "qcom,msm8996-cci";
> > > > +			#address-cells = <1>;
> > > > +			#size-cells = <0>;
> > > > +
> > > > +			reg = <0 0x0ac4a000 0 0x4000>;
> > > > +			interrupts = <GIC_SPI 460 IRQ_TYPE_EDGE_RISING>;
> > > > +			power-domains = <&camcc TITAN_TOP_GDSC>;
> > > > +
> > > > +			clocks = <&camcc CAM_CC_CAMNOC_AXI_CLK>,
> > > > +				 <&camcc CAM_CC_SOC_AHB_CLK>,
> > > > +				 <&camcc CAM_CC_CPAS_AHB_CLK>,
> > > > +				 <&camcc CAM_CC_CCI_CLK>;
> > > > +			clock-names = "camnoc_axi",
> > > > +				      "soc_ahb",
> > > > +				      "cpas_ahb",
> > > > +				      "cci";
> > > > +
> > > > +			pinctrl-names = "default", "sleep";
> > > > +			pinctrl-0 = <&cci0_default &cci1_default>;
> > > > +			pinctrl-1 = <&cci0_sleep &cci1_sleep>;
> > > > +
> > > > +			status = "disabled";
> > > > +
> > > > +			cci_i2c0: i2c-bus@0 {
> > > > +				reg = <0>;
> > > > +				clock-frequency = <1000000>;
> > > > +				#address-cells = <1>;
> > > > +				#size-cells = <0>;
> > > > +			};
> > > > +
> > > > +			cci_i2c1: i2c-bus@1 {
> > > > +				reg = <1>;
> > > > +				clock-frequency = <1000000>;
> > > > +				#address-cells = <1>;
> > > > +				#size-cells = <0>;
> > > > +			};
> > > > +		};
> > > > +
> > > > +		camss: camera-controller@acb3000 {
> > > 
> > > Wasn't it agreed recently to have 'isp' as a generic device name for CAMSS IP?
> > 
> > Yeah, will change.
> > 
> > > 
> > > > +			compatible = "qcom,sdm670-camss";
> > > > +			reg = <0 0x0acb3000 0 0x1000>,
> > > > +			      <0 0x0acba000 0 0x1000>,
> > > > +			      <0 0x0acc8000 0 0x1000>,
> > > > +			      <0 0x0ac65000 0 0x1000>,
> > > > +			      <0 0x0ac66000 0 0x1000>,
> > > > +			      <0 0x0ac67000 0 0x1000>,
> > > > +			      <0 0x0acaf000 0 0x4000>,
> > > > +			      <0 0x0acb6000 0 0x4000>,
> > > > +			      <0 0x0acc4000 0 0x4000>;
> > > > +			reg-names = "csid0",
> > > > +				    "csid1",
> > > > +				    "csid2",
> > > > +				    "csiphy0",
> > > > +				    "csiphy1",
> > > > +				    "csiphy2",
> > > > +				    "vfe0",
> > > > +				    "vfe1",
> > > > +				    "vfe_lite";
> > > > +
> > > > +			clocks = <&camcc CAM_CC_CAMNOC_AXI_CLK>,
> > > > +				 <&camcc CAM_CC_CPAS_AHB_CLK>,
> > > > +				 <&camcc CAM_CC_IFE_0_CSID_CLK>,
> > > > +				 <&camcc CAM_CC_IFE_1_CSID_CLK>,
> > > > +				 <&camcc CAM_CC_IFE_LITE_CSID_CLK>,
> > > > +				 <&camcc CAM_CC_CSIPHY0_CLK>,
> > > > +				 <&camcc CAM_CC_CSI0PHYTIMER_CLK>,
> > > > +				 <&camcc CAM_CC_CSIPHY1_CLK>,
> > > > +				 <&camcc CAM_CC_CSI1PHYTIMER_CLK>,
> > > > +				 <&camcc CAM_CC_CSIPHY2_CLK>,
> > > > +				 <&camcc CAM_CC_CSI2PHYTIMER_CLK>,
> > > > +				 <&gcc GCC_CAMERA_AHB_CLK>,
> > > > +				 <&gcc GCC_CAMERA_AXI_CLK>,
> > > > +				 <&camcc CAM_CC_SOC_AHB_CLK>,
> > > > +				 <&camcc CAM_CC_IFE_0_CLK>,
> > > > +				 <&camcc CAM_CC_IFE_0_AXI_CLK>,
> > > > +				 <&camcc CAM_CC_IFE_0_CPHY_RX_CLK>,
> > > > +				 <&camcc CAM_CC_IFE_1_CLK>,
> > > > +				 <&camcc CAM_CC_IFE_1_AXI_CLK>,
> > > > +				 <&camcc CAM_CC_IFE_1_CPHY_RX_CLK>,
> > > > +				 <&camcc CAM_CC_IFE_LITE_CLK>,
> > > > +				 <&camcc CAM_CC_IFE_LITE_CPHY_RX_CLK>;
> > > > +			clock-names = "camnoc_axi",
> > > > +				      "cpas_ahb",
> > > > +				      "csi0",
> > > > +				      "csi1",
> > > > +				      "csi2",
> > > > +				      "csiphy0",
> > > > +				      "csiphy0_timer",
> > > > +				      "csiphy1",
> > > > +				      "csiphy1_timer",
> > > > +				      "csiphy2",
> > > > +				      "csiphy2_timer",
> > > > +				      "gcc_camera_ahb",
> > > > +				      "gcc_camera_axi",
> > > > +				      "soc_ahb",
> > > > +				      "vfe0",
> > > > +				      "vfe0_axi",
> > > > +				      "vfe0_cphy_rx",
> > > > +				      "vfe1",
> > > > +				      "vfe1_axi",
> > > > +				      "vfe1_cphy_rx",
> > > > +				      "vfe_lite",
> > > > +				      "vfe_lite_cphy_rx";
> > > > +
> > > > +			interrupts = <GIC_SPI 464 IRQ_TYPE_EDGE_RISING>,
> > > > +				     <GIC_SPI 466 IRQ_TYPE_EDGE_RISING>,
> > > > +				     <GIC_SPI 468 IRQ_TYPE_EDGE_RISING>,
> > > > +				     <GIC_SPI 477 IRQ_TYPE_EDGE_RISING>,
> > > > +				     <GIC_SPI 478 IRQ_TYPE_EDGE_RISING>,
> > > > +				     <GIC_SPI 479 IRQ_TYPE_EDGE_RISING>,
> > > > +				     <GIC_SPI 465 IRQ_TYPE_EDGE_RISING>,
> > > > +				     <GIC_SPI 467 IRQ_TYPE_EDGE_RISING>,
> > > > +				     <GIC_SPI 469 IRQ_TYPE_EDGE_RISING>;
> > > > +			interrupt-names = "csid0",
> > > > +					  "csid1",
> > > > +					  "csid2",
> > > > +					  "csiphy0",
> > > > +					  "csiphy1",
> > > > +					  "csiphy2",
> > > > +					  "vfe0",
> > > > +					  "vfe1",
> > > > +					  "vfe_lite";
> > > > +
> > > > +			iommus = <&apps_smmu 0x808 0x0>,
> > > > +				 <&apps_smmu 0x810 0x8>,
> > > > +				 <&apps_smmu 0xc08 0x0>,
> > > > +				 <&apps_smmu 0xc10 0x8>;
> > > > +
> > > > +			power-domains = <&camcc IFE_0_GDSC>,
> > > > +					<&camcc IFE_1_GDSC>,
> > > > +					<&camcc TITAN_TOP_GDSC>;
> > > > +			power-domain-names = "ife0",
> > > > +					     "ife1",
> > > > +					     "top";
> > > > +
> > > > +			status = "disabled";
> > > > +
> > > > +			ports {
> > > > +				#address-cells = <1>;
> > > > +				#size-cells = <0>;
> > > > +
> > > > +				camss_port0: port@0 {
> > > > +					reg = <0>;
> > > > +				};
> > > > +
> > > > +				camss_port1: port@1 {
> > > > +					reg = <1>;
> > > > +				};
> > > > +
> > > > +				camss_port2: port@2 {
> > > 
> > > Likely labels to ports are excessive here, please remove them.
> > 
> > How would you imagine connecting a camera to the ports, then? For MDSS,
> > there's a label for the endpoint (mdss_dsi0_out) which the device DTS
> > can then reference:
> > 
> > 	&mdss_dsi0_out {
> > 		remote-endpoint = <&panel_in>;
> > 		data-lanes = <0 1 2 3>;
> > 	};
> > 
> > For CAMSS, the port labels would be used like so:
> > 
> > 	&camss_port1 {
> > 		camss_endpoint1: endpoint {
> > 			clock-lanes = <7>;
> > 			data-lanes = <0 1 2 3>;
> > 			remote-endpoint = <&cam_front_endpoint>;
> > 		};
> > 	};
> > 
> > Without the labels, the connection might look something like:
> > 
> 
> Even if you insist on moving endpoints out of &camss, then why do
> you add port labels? Unavoidably you do have endpoint labels, so
> it's non-obvious why the version above is better than the next one:
> 
> 	&camss_endpoint1 {
> 		clock-lanes = <7>;
> 		data-lanes = <0 1 2 3>;
> 		remote-endpoint = <&cam_front_endpoint>;
> 	};
> 
> Minus two lines of code, minus one label. Port labels are not needed.

Thanks for having me look into this.

In DTSI:

	ports {
		#address-cells = <1>;
		#size-cells = <0>;

		camss_port0: port@0 {
			reg = <0>;

			camss_endpoint0: endpoint {
			};
		};

		camss_port1: port@1 {
			reg = <1>;

			camss_endpoint1: endpoint {
			};
		};

		camss_port2: port@2 {
			reg = <2>;

			camss_endpoint2: endpoint {
			};
		};
	};

The example above doesn't work as-is.

	[   15.387215] qcom-camss acb3000.camera-controller: Cannot get remote parent
	[   15.387604] qcom-camss acb3000.camera-controller: probe with driver qcom-camss failed with error -22

However, the camss_of_parse_ports function has a way to make it work,
even if all endpoint nodes are present.

In DTSI:

	ports {
		#address-cells = <1>;
		#size-cells = <0>;

		camss_port0: port@0 {
			reg = <0>;

			camss_endpoint0: endpoint {
				status = "disabled";
			};
		};

		camss_port1: port@1 {
			reg = <1>;

			camss_endpoint1: endpoint {
				status = "disabled";
			};
		};

		camss_port2: port@2 {
			reg = <2>;

			camss_endpoint2: endpoint {
				status = "disabled";
			};
		};
	};

In DTS:

 	&camss_endpoint1 {
 		clock-lanes = <7>;
 		data-lanes = <0 1 2 3>;
 		remote-endpoint = <&cam_front_endpoint>;
		status = "okay";
 	};

I didn't know how to make the working example.

      reply	other threads:[~2024-12-17 23:06 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-12-16 22:30 [PATCH v8 0/5] Add SDM670 camera subsystem Richard Acayan
2024-12-16 22:30 ` [PATCH v8 1/5] dt-bindings: clock: qcom,sdm845-camcc: add sdm670 compatible Richard Acayan
2024-12-16 22:30 ` [PATCH v8 2/5] dt-bindings: media: camss: Add qcom,sdm670-camss Richard Acayan
2024-12-16 22:47   ` Bryan O'Donoghue
2024-12-17  6:20   ` Krzysztof Kozlowski
2024-12-16 22:30 ` [PATCH v8 3/5] media: qcom: camss: add support for SDM670 camss Richard Acayan
2024-12-16 22:41   ` Bryan O'Donoghue
2024-12-17 23:20     ` Richard Acayan
2024-12-17  6:21   ` Krzysztof Kozlowski
2024-12-16 22:30 ` [PATCH v8 4/5] arm64: dts: qcom: sdm670: add camcc Richard Acayan
2024-12-16 22:30 ` [PATCH v8 5/5] arm64: dts: qcom: sdm670: add camss and cci Richard Acayan
2024-12-17  7:31   ` Vladimir Zapolskiy
2024-12-17 20:25     ` Richard Acayan
2024-12-17 21:34       ` Vladimir Zapolskiy
2024-12-17 23:06         ` Richard Acayan [this message]

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=Z2ID8BrR9f38iy3s@radian \
    --to=mailingradian@gmail.com \
    --cc=andersson@kernel.org \
    --cc=bryan.odonoghue@linaro.org \
    --cc=conor+dt@kernel.org \
    --cc=devicetree@vger.kernel.org \
    --cc=konradybcio@kernel.org \
    --cc=krzk+dt@kernel.org \
    --cc=linux-arm-msm@vger.kernel.org \
    --cc=linux-clk@vger.kernel.org \
    --cc=linux-media@vger.kernel.org \
    --cc=mchehab@kernel.org \
    --cc=mturquette@baylibre.com \
    --cc=rfoss@kernel.org \
    --cc=robh@kernel.org \
    --cc=sboyd@kernel.org \
    --cc=todor.too@gmail.com \
    --cc=vladimir.zapolskiy@linaro.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox