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Thu, 19 Dec 2024 10:51:47 +0000 (UTC) Date: Thu, 19 Dec 2024 10:51:46 +0000 From: Charles Keepax To: Krzysztof Kozlowski CC: Paul Handrigan , , , , , , , , Subject: Re: [PATCH v2 2/2] clk: cs2600: Add Fractional-N clock driver Message-ID: References: <20241219024631.3145377-1-paulha@opensource.cirrus.com> <20241219024631.3145377-3-paulha@opensource.cirrus.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Disposition: inline In-Reply-To: X-Proofpoint-ORIG-GUID: X1s2aJ_6-1fY9fEMps7Yd01IZyuXaCAa X-Proofpoint-GUID: X1s2aJ_6-1fY9fEMps7Yd01IZyuXaCAa X-Proofpoint-Spam-Reason: safe On Thu, Dec 19, 2024 at 09:48:05AM +0100, Krzysztof Kozlowski wrote: > On Wed, Dec 18, 2024 at 08:46:31PM -0600, Paul Handrigan wrote: > > +/* DEVICE_ID2 */ > > +#define CS2600_AREVID_MASK GENMASK(7, 4) > > +#define CS2600_MTLRVID_MASK GENMASK(3, 0) > > + > > +/* UNLOCK_INDICATORS */ > > +#define CS2600_P_UNLOCK_STICKY BIT(3) > > +#define CS2600_P_UNLOCK BIT(2) > > +#define CS2600_F_UNLOCK_STICKY BIT(1) > > +#define CS2600_F_UNLOCK BIT(0) > > + > > +/* ERROR_STS */ > > +#define CS2600_ERR_DEV_DEFECT BIT(7) /* Device defective */ > > +#define CS2600_ERR_OTP_CORRUPT BIT(6) > > +#define CS2600_ERR_REG_CFG BIT(5) /* Invalid register config */ > > +#define CS2600_ERR_PLL_DISABLED BIT(4) > > +#define CS2600_ERR_HW_CFG BIT(3) /* Invalid HW Config */ > > +#define CS2600_ERR_REFCLK_MISSING BIT(2) > > +#define CS2600_ERR_CLKIN_UNSTABLE BIT(1) > > +#define CS2600_ERR_CLKIN_MISSING BIT(0) > > + > > +#define CS2600_PLL_OUT 0 > > +#define CS2600_CLK_OUT 1 > > +#define CS2600_BCLK_OUT 2 > > +#define CS2600_FSYNC_OUT 3 > > No, the entire point of the binding header is to bind. Drop all four > above and use properly your header. > > Otherwise I claim your binding header is not used or not really a > binding. > This excert is from the drivers internal header not the binding header? Thanks, Charles