From: Wasim Nazir <quic_wasimn@quicinc.com>
To: Bjorn Andersson <andersson@kernel.org>
Cc: Konrad Dybcio <konradybcio@kernel.org>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
<linux-arm-msm@vger.kernel.org>, <devicetree@vger.kernel.org>,
<linux-kernel@vger.kernel.org>, <kernel@quicinc.com>
Subject: Re: [PATCH v5 5/6] arm64: dts: qcom: Add support for QCS9075 Ride & Ride-r3
Date: Thu, 9 Jan 2025 19:06:53 +0530 [thread overview]
Message-ID: <Z3/Q9SdpjrO4zS59@hu-wasimn-hyd.qualcomm.com> (raw)
In-Reply-To: <44tjbxjrigbfu4dfrlbvdprablyhf3i5u4fvg3iwucfvmvljqv@t43py5mb4rg3>
On Mon, Jan 06, 2025 at 05:59:01PM -0600, Bjorn Andersson wrote:
> On Sun, Dec 29, 2024 at 08:53:31PM +0530, Wasim Nazir wrote:
> > Add device tree support for QCS9075 Ride & Ride-r3 boards.
> >
> > QCS9075 lacks the safety monitoring features of Safety-Island (SAIL)
> > subsystem which is available in QCS9100, and it affects thermal
> > management.
> >
> > Also, between ride and ride-r3 ethernet phy is different.
> > Ride uses 1G ethernet phy while ride-r3 uses 2.5G ethernet phy.
> >
>
> This commit message is written under the assumption that the reader
> first reads the patch, to determine what QCS9075 subtracts features
> from.
>
> Please describe what the QCS9075 Ride and Ride R3 are, if it's just a
> variant of QCS9100 without SAIL, write that - and if that is all the
> difference, then Dmitry's request makes total sense.
>
9075 is not derived from 9100 but from 8775, though difference between
9075 & 9100 is only SAIL. And in commit message I have tried to add
details to differentiate between 9075 & 9100 and most importantly to
highlight why we need sperate DT for 9075.
Will add more details in commit message instead of adding it in
cover-letter.
Also, I am convinced to proceed with Dmitry's approach to structure the
DT.
>
> Also, subject prefix doesn't match upstream style. Prefix with the
> subsystem/platform/device and avoid "for XYZ". See "git log" on a few
> of the other files to see how it should look like.
Sure will change this accordingly.
>
> Thanks,
> Bjorn
>
> > Signed-off-by: Wasim Nazir <quic_wasimn@quicinc.com>
> > ---
> > arch/arm64/boot/dts/qcom/Makefile | 2 +
> > arch/arm64/boot/dts/qcom/qcs9075-ride-r3.dts | 46 ++++++++++++++++++++
> > arch/arm64/boot/dts/qcom/qcs9075-ride.dts | 46 ++++++++++++++++++++
> > 3 files changed, 94 insertions(+)
> > create mode 100644 arch/arm64/boot/dts/qcom/qcs9075-ride-r3.dts
> > create mode 100644 arch/arm64/boot/dts/qcom/qcs9075-ride.dts
> >
> > diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile
> > index 78613a1bd34a..41cb2bbd3472 100644
> > --- a/arch/arm64/boot/dts/qcom/Makefile
> > +++ b/arch/arm64/boot/dts/qcom/Makefile
> > @@ -118,6 +118,8 @@ dtb-$(CONFIG_ARCH_QCOM) += qcs6490-rb3gen2.dtb
> > dtb-$(CONFIG_ARCH_QCOM) += qcs8300-ride.dtb
> > dtb-$(CONFIG_ARCH_QCOM) += qcs8550-aim300-aiot.dtb
> > dtb-$(CONFIG_ARCH_QCOM) += qcs9075-rb8.dtb
> > +dtb-$(CONFIG_ARCH_QCOM) += qcs9075-ride.dtb
> > +dtb-$(CONFIG_ARCH_QCOM) += qcs9075-ride-r3.dtb
> > dtb-$(CONFIG_ARCH_QCOM) += qcs9100-ride.dtb
> > dtb-$(CONFIG_ARCH_QCOM) += qcs9100-ride-r3.dtb
> > dtb-$(CONFIG_ARCH_QCOM) += qdu1000-idp.dtb
> > diff --git a/arch/arm64/boot/dts/qcom/qcs9075-ride-r3.dts b/arch/arm64/boot/dts/qcom/qcs9075-ride-r3.dts
> > new file mode 100644
> > index 000000000000..d9a8956d3a76
> > --- /dev/null
> > +++ b/arch/arm64/boot/dts/qcom/qcs9075-ride-r3.dts
> > @@ -0,0 +1,46 @@
> > +// SPDX-License-Identifier: BSD-3-Clause
> > +/*
> > + * Copyright (c) 2024, Qualcomm Innovation Center, Inc. All rights reserved.
> > + */
> > +/dts-v1/;
> > +
> > +#include "sa8775p-ride.dtsi"
> > +
> > +/ {
> > + model = "Qualcomm Technologies, Inc. QCS9075 Ride Rev3";
> > + compatible = "qcom,qcs9075-ride-r3", "qcom,qcs9075", "qcom,sa8775p";
> > +};
> > +
> > +ðernet0 {
> > + phy-mode = "2500base-x";
> > +};
> > +
> > +ðernet1 {
> > + phy-mode = "2500base-x";
> > +};
> > +
> > +&mdio {
> > + compatible = "snps,dwmac-mdio";
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > +
> > + sgmii_phy0: phy@8 {
> > + compatible = "ethernet-phy-id31c3.1c33";
> > + reg = <0x8>;
> > + device_type = "ethernet-phy";
> > + interrupts-extended = <&tlmm 7 IRQ_TYPE_EDGE_FALLING>;
> > + reset-gpios = <&pmm8654au_2_gpios 8 GPIO_ACTIVE_LOW>;
> > + reset-assert-us = <11000>;
> > + reset-deassert-us = <70000>;
> > + };
> > +
> > + sgmii_phy1: phy@0 {
> > + compatible = "ethernet-phy-id31c3.1c33";
> > + reg = <0x0>;
> > + device_type = "ethernet-phy";
> > + interrupts-extended = <&tlmm 26 IRQ_TYPE_EDGE_FALLING>;
> > + reset-gpios = <&pmm8654au_2_gpios 9 GPIO_ACTIVE_LOW>;
> > + reset-assert-us = <11000>;
> > + reset-deassert-us = <70000>;
> > + };
> > +};
> > diff --git a/arch/arm64/boot/dts/qcom/qcs9075-ride.dts b/arch/arm64/boot/dts/qcom/qcs9075-ride.dts
> > new file mode 100644
> > index 000000000000..3b524359a72d
> > --- /dev/null
> > +++ b/arch/arm64/boot/dts/qcom/qcs9075-ride.dts
> > @@ -0,0 +1,46 @@
> > +// SPDX-License-Identifier: BSD-3-Clause
> > +/*
> > + * Copyright (c) 2024, Qualcomm Innovation Center, Inc. All rights reserved.
> > + */
> > +/dts-v1/;
> > +
> > +#include "sa8775p-ride.dtsi"
> > +
> > +/ {
> > + model = "Qualcomm Technologies, Inc. QCS9075 Ride";
> > + compatible = "qcom,qcs9075-ride", "qcom,qcs9075", "qcom,sa8775p";
> > +};
> > +
> > +ðernet0 {
> > + phy-mode = "sgmii";
> > +};
> > +
> > +ðernet1 {
> > + phy-mode = "sgmii";
> > +};
> > +
> > +&mdio {
> > + compatible = "snps,dwmac-mdio";
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > +
> > + sgmii_phy0: phy@8 {
> > + compatible = "ethernet-phy-id0141.0dd4";
> > + reg = <0x8>;
> > + device_type = "ethernet-phy";
> > + interrupts-extended = <&tlmm 7 IRQ_TYPE_EDGE_FALLING>;
> > + reset-gpios = <&pmm8654au_2_gpios 8 GPIO_ACTIVE_LOW>;
> > + reset-assert-us = <11000>;
> > + reset-deassert-us = <70000>;
> > + };
> > +
> > + sgmii_phy1: phy@a {
> > + compatible = "ethernet-phy-id0141.0dd4";
> > + reg = <0xa>;
> > + device_type = "ethernet-phy";
> > + interrupts-extended = <&tlmm 26 IRQ_TYPE_EDGE_FALLING>;
> > + reset-gpios = <&pmm8654au_2_gpios 9 GPIO_ACTIVE_LOW>;
> > + reset-assert-us = <11000>;
> > + reset-deassert-us = <70000>;
> > + };
> > +};
> > --
> > 2.47.0
> >
Thanks & Regards,
Wasim
next prev parent reply other threads:[~2025-01-09 13:37 UTC|newest]
Thread overview: 59+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-12-29 15:23 [PATCH v5 0/6] arm64: qcom: Add support for QCS9075 boards Wasim Nazir
2024-12-29 15:23 ` [PATCH v5 1/6] dt-bindings: arm: qcom,ids: add SoC ID for QCS9075 Wasim Nazir
2024-12-29 15:23 ` [PATCH v5 2/6] soc: qcom: socinfo: add QCS9075 SoC ID Wasim Nazir
2024-12-29 15:23 ` [PATCH v5 3/6] dt-bindings: arm: qcom: Document rb8/ride/ride-r3 on QCS9075 Wasim Nazir
2024-12-29 15:23 ` [PATCH v5 4/6] arm64: dts: qcom: Add support for QCS9075 RB8 Wasim Nazir
2025-05-06 12:08 ` Dmitry Baryshkov
2025-05-06 12:29 ` Wasim Nazir
2025-05-06 12:30 ` Dmitry Baryshkov
2025-05-06 13:14 ` Wasim Nazir
2025-05-09 22:56 ` Konrad Dybcio
2024-12-29 15:23 ` [PATCH v5 5/6] arm64: dts: qcom: Add support for QCS9075 Ride & Ride-r3 Wasim Nazir
2024-12-30 15:32 ` Konrad Dybcio
2024-12-31 5:10 ` Andrew Lunn
2025-01-02 9:13 ` Wasim Nazir
2024-12-30 15:45 ` Dmitry Baryshkov
2025-01-02 9:07 ` Wasim Nazir
2025-01-03 5:50 ` Dmitry Baryshkov
2025-01-03 7:07 ` Wasim Nazir
2025-01-03 10:31 ` Dmitry Baryshkov
2025-01-03 18:59 ` Wasim Nazir
2025-01-03 19:58 ` Dmitry Baryshkov
2025-01-08 14:09 ` Krzysztof Kozlowski
2025-01-09 14:47 ` Wasim Nazir
2025-01-09 15:03 ` Wasim Nazir
2025-01-09 16:16 ` Krzysztof Kozlowski
2025-01-15 5:48 ` Wasim Nazir
2025-01-15 8:35 ` Krzysztof Kozlowski
2025-02-27 7:37 ` Wasim Nazir
2025-03-03 7:46 ` Krzysztof Kozlowski
2025-03-06 8:17 ` Wasim Nazir
2025-03-06 8:25 ` Wasim Nazir
2025-03-11 8:02 ` Krzysztof Kozlowski
2025-03-20 11:45 ` Wasim Nazir
2025-03-29 4:48 ` Krzysztof Kozlowski
2025-04-02 6:48 ` Wasim Nazir
2025-03-11 7:59 ` Krzysztof Kozlowski
2025-01-09 13:52 ` Wasim Nazir
2025-01-06 23:59 ` Bjorn Andersson
2025-01-09 13:36 ` Wasim Nazir [this message]
2024-12-29 15:23 ` [PATCH v5 6/6] arm64: dts: qcom: Enable cpu cooling devices for QCS9075 platforms Wasim Nazir
2024-12-30 6:02 ` Aiqun(Maria) Yu
2024-12-30 15:35 ` Konrad Dybcio
2024-12-31 11:05 ` Manaf Meethalavalappu Pallikunhi
2024-12-31 16:21 ` Konrad Dybcio
2025-01-08 12:10 ` Manaf Meethalavalappu Pallikunhi
2024-12-30 15:40 ` Dmitry Baryshkov
2024-12-31 12:01 ` Manaf Meethalavalappu Pallikunhi
2025-01-03 5:51 ` Dmitry Baryshkov
2025-01-08 12:27 ` Manaf Meethalavalappu Pallikunhi
2025-01-08 12:46 ` Dmitry Baryshkov
2025-01-08 16:08 ` Manaf Meethalavalappu Pallikunhi
2025-01-09 14:30 ` Konrad Dybcio
2025-01-09 23:54 ` Dmitry Baryshkov
2025-01-10 12:31 ` Konrad Dybcio
2025-01-13 8:43 ` Dmitry Baryshkov
2025-01-14 19:16 ` Manaf Meethalavalappu Pallikunhi
2025-01-15 8:54 ` Dmitry Baryshkov
2024-12-30 18:17 ` [PATCH v5 0/6] arm64: qcom: Add support for QCS9075 boards Rob Herring (Arm)
2025-01-07 16:38 ` (subset) " Bjorn Andersson
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=Z3/Q9SdpjrO4zS59@hu-wasimn-hyd.qualcomm.com \
--to=quic_wasimn@quicinc.com \
--cc=andersson@kernel.org \
--cc=conor+dt@kernel.org \
--cc=devicetree@vger.kernel.org \
--cc=kernel@quicinc.com \
--cc=konradybcio@kernel.org \
--cc=krzk+dt@kernel.org \
--cc=linux-arm-msm@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=robh@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).