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Tue, 21 Jan 2025 01:36:05 -0800 (PST) Received: from spiri ([5.2.194.157]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-437c753c617sm233228395e9.37.2025.01.21.01.36.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 21 Jan 2025 01:36:05 -0800 (PST) Date: Tue, 21 Jan 2025 11:36:02 +0200 From: Alisa-Dariana Roman To: Jonathan Cameron Cc: Alisa-Dariana Roman , Jonathan Cameron , David Lechner , Uwe =?utf-8?Q?Kleine-K=C3=B6nig?= , linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Lars-Peter Clausen , Michael Hennerich , Rob Herring , Krzysztof Kozlowski , Conor Dooley Subject: Re: [PATCH v1 1/3] iio: adc: ad_sigma_delta: Add CS assert function Message-ID: References: <20241221155926.81954-1-alisa.roman@analog.com> <20241221155926.81954-2-alisa.roman@analog.com> <20241222180713.64f27040@jic23-huawei> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20241222180713.64f27040@jic23-huawei> On Sun, Dec 22, 2024 at 06:07:13PM +0000, Jonathan Cameron wrote: > On Sat, 21 Dec 2024 17:56:00 +0200 > Alisa-Dariana Roman wrote: > > > Some sigma-delta ADCs, such as AD7191 and AD7780, have no registers and > > start conversion when CS is asserted. Add helper function to support > > this use case by allowing devices to assert CS without performing > > register operations. > Hi Alisa-Dariana, > > I had a look at the ad7191 datasheet. Given this description, > I was expecting to see it do a pre pulse of the chip select to trigger > the acquisition. However, what I see is a power down line (which is more > or less a chip select) but it just has a specified t1 delay before the > DOUT will change to the state for the first bit and the host > can start driving the clock. > > That can be done by setting spi_device->cs_setup to whatever delay is > needed. The text is spi_device docs are a little vague, > but I'd take it as t1 + t2 (maybe t3 to be safe). > > That is going to be more reliable than trying to hold the cs across > messages / spi_sync() calls, particularly if the bus might not be > locked (which the code below suggests). > > Jonathan > > Hello Jonathan! I am grateful for your and everyone's feedback, as always! I got a bit stuck on this part. The motivation for adding this function is as following: int ad_sigma_delta_single_conversion(struct iio_dev *indio_dev, const struct iio_chan_spec *chan, int *val) { ... ad_sigma_delta_set_mode(sigma_delta, AD_SD_MODE_SINGLE); ad_sd_enable_irq(sigma_delta); ret = wait_for_completion_interruptible_timeout( &sigma_delta->completion, HZ); ... } I noticed that adc drivers need to call the ad_sd_write_reg function in their callback set_mode function, in order to keep the cs line pulled down before waiting for the interrupt (if I understand correctly). But since this component and AD7780 have no register I just copied the functionality of ad_sd_write_reg without actually writing anything. Should I change the description/name to more accurately present the functionality? Or would it be a better idea to not use the single conversion function and write something from scratch leveraging the cs_setup? Thank you! Kind regards, Alisa-Dariana Roman.