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[130.180.211.218]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-438e245efbcsm17275025e9.33.2025.01.30.02.07.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 30 Jan 2025 02:07:05 -0800 (PST) Date: Thu, 30 Jan 2025 11:07:03 +0100 From: Daniel Lezcano To: Claudiu Beznea Cc: rafael@kernel.org, rui.zhang@intel.com, lukasz.luba@arm.com, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, geert+renesas@glider.be, magnus.damm@gmail.com, mturquette@baylibre.com, sboyd@kernel.org, p.zabel@pengutronix.de, ulf.hansson@linaro.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org, Claudiu Beznea Subject: Re: [PATCH 2/6] thermal: of: Export non-devres helper to register/unregister thermal zone Message-ID: References: <20250103163805.1775705-1-claudiu.beznea.uj@bp.renesas.com> <20250103163805.1775705-3-claudiu.beznea.uj@bp.renesas.com> <65a16c3f-456e-40ec-91b0-afb57269ed46@tuxon.dev> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <65a16c3f-456e-40ec-91b0-afb57269ed46@tuxon.dev> On Thu, Jan 30, 2025 at 11:08:03AM +0200, Claudiu Beznea wrote: > Hi, Daniel, > > On 29.01.2025 19:24, Daniel Lezcano wrote: > > Hi Claudiu, > > > > On Fri, Jan 03, 2025 at 06:38:01PM +0200, Claudiu wrote: > >> From: Claudiu Beznea > >> > >> On the Renesas RZ/G3S (and other Renesas SoCs, e.g., RZ/G2{L, LC, UL}), > >> clocks are managed through PM domains. These PM domains, registered on > >> behalf of the clock controller driver, are configured with > >> GENPD_FLAG_PM_CLK. In most of the Renesas drivers used by RZ SoCs, the > >> clocks are enabled/disabled using runtime PM APIs. > >> > >> During probe, devices are attached to the PM domain controlling their > >> clocks. Similarly, during removal, devices are detached from the PM domain. > >> > >> The detachment call stack is as follows: > >> > >> device_driver_detach() -> > >> device_release_driver_internal() -> > >> __device_release_driver() -> > >> device_remove() -> > >> platform_remove() -> > >> dev_pm_domain_detach() > >> > >> In the upcoming Renesas RZ/G3S thermal driver, the > >> struct thermal_zone_device_ops::change_mode API is implemented to > >> start/stop the thermal sensor unit. Register settings are updated within > >> the change_mode API. > >> > >> In case devres helpers are used for thermal zone register/unregister the > >> struct thermal_zone_device_ops::change_mode API is invoked when the > >> driver is unbound. The identified call stack is as follows: > >> > >> device_driver_detach() -> > >> device_release_driver_internal() -> > >> device_unbind_cleanup() -> > >> devres_release_all() -> > >> devm_thermal_of_zone_release() -> > >> thermal_zone_device_disable() -> > >> thermal_zone_device_set_mode() -> > >> rzg3s_thermal_change_mode() > >> > >> The device_unbind_cleanup() function is called after the thermal device is > >> detached from the PM domain (via dev_pm_domain_detach()). > >> > >> The rzg3s_thermal_change_mode() implementation calls > >> pm_runtime_resume_and_get()/pm_runtime_put_autosuspend() before/after > >> accessing the registers. However, during the unbind scenario, the > >> devm_thermal_of_zone_release() is invoked after dev_pm_domain_detach(). > >> Consequently, the clocks are not enabled, as the device is removed from > >> the PM domain at this time, leading to an Asynchronous SError Interrupt. > >> The system cannot be used after this. > > > > I've been through the driver before responding to this change. What is the > > benefit of powering down / up (or clock off / on) the thermal sensor when > > reading the temperature ? > > > > I can understand for disable / enable but I don't get for the classic usage > > where a governor will be reading the temperature regularly. > > I tried to be as power saving as possible both at runtime and after the IP > is not used anymore as the HW manual doesn't mentioned anything about > accuracy or implications of disabling the IP clock at runtime. We use > similar approach (of disabling clocks at runtime) for other IPs in the > RZ/G3S SoC as well. > > > > > Would the IP need some cycles to capture the temperature accurately after the > > clock is enabled ? > > There is nothing about this mentioned about this in the HW manual of the > RZ/G3S SoC. The only points mentioned are as described in the driver code: > - wait at least 3us after each IIO channel read > - wait at least 30us after enabling the sensor > - wait at least 50us after setting OE bit in TSU_SM > > For this I chose to have it implemented as proposed. IMO, disabling/enabling the clock between two reads through the pm runtime may not be a good thing, especially if the system enters a thermal situation where it has to mitigate. Without any testing capturing the temperatures and compare between the always-on and on/off, it is hard to say if it is true or not. Up to you to test that or not. If you think it is fine, then let's go with it. > If any, the HW manual is available here > https://www.renesas.com/en/document/mah/rzg3s-group-users-manual-hardware?r=25458591 > (an archive is here; the manual is in Deliverables/r01uh1014ej0110-rzg3s.pdf) > > Thank you for your review, > Claudiu > > > > >> Add thermal_of_zone_register()/thermal_of_zone_unregister(). These will > >> be used in the upcomming RZ/G3S thermal driver. > >> > >> Signed-off-by: Claudiu Beznea > -- Linaro.org │ Open source software for ARM SoCs Follow Linaro: Facebook | Twitter | Blog