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X-CSE-ConnectionGUID: lnH5xp24T1KyGOKkpRfm7w== X-CSE-MsgGUID: qVNyYJJ8Sr+QUKYke6/7YA== X-IronPort-AV: E=McAfee;i="6700,10204,11343"; a="57673742" X-IronPort-AV: E=Sophos;i="6.13,282,1732608000"; d="scan'208";a="57673742" Received: from fmviesa006.fm.intel.com ([10.60.135.146]) by fmvoesa102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Feb 2025 02:57:41 -0800 X-CSE-ConnectionGUID: P9Bh1cBQShitd1WRAq7ksg== X-CSE-MsgGUID: R1RQoslhSjeSCVtbJOXViQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.13,282,1732608000"; d="scan'208";a="112974706" Received: from smile.fi.intel.com ([10.237.72.58]) by fmviesa006.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Feb 2025 02:57:38 -0800 Received: from andy by smile.fi.intel.com with local (Exim 4.98) (envelope-from ) id 1tiWuV-0000000B8kk-0Vn6; Thu, 13 Feb 2025 12:57:35 +0200 Date: Thu, 13 Feb 2025 12:57:34 +0200 From: "andriy.shevchenko@linux.intel.com" To: Kartik Rajput Cc: Jon Hunter , "robh@kernel.org" , "robert.marko@sartura.hr" , "arnd@kernel.org" , "thierry.reding@gmail.com" , "linux-kernel@vger.kernel.org" , "conor+dt@kernel.org" , "geert+renesas@glider.be" , "devicetree@vger.kernel.org" , "jirislaby@kernel.org" , "krzk+dt@kernel.org" , "hvilleneuve@dimonoff.com" , "schnelle@linux.ibm.com" , "linux-serial@vger.kernel.org" , "gregkh@linuxfoundation.org" , "linux-tegra@vger.kernel.org" Subject: Re: [PATCH v3 2/2] serial: tegra-utc: Add driver for Tegra UART Trace Controller (UTC) Message-ID: References: <20250212104132.61060-1-kkartik@nvidia.com> <20250212104132.61060-3-kkartik@nvidia.com> <88a54c9bf88dac0a3316224b08d0e2378e8fc6f0.camel@nvidia.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <88a54c9bf88dac0a3316224b08d0e2378e8fc6f0.camel@nvidia.com> Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo On Thu, Feb 13, 2025 at 10:11:36AM +0000, Kartik Rajput wrote: > On Thu, 2025-02-13 at 11:55 +0200, andriy.shevchenko@linux.intel.com > wrote: > > On Thu, Feb 13, 2025 at 09:05:36AM +0000, Kartik Rajput wrote: > > > On Wed, 2025-02-12 at 17:09 +0200, Andy Shevchenko wrote: > > > > On Wed, Feb 12, 2025 at 04:11:32PM +0530, Kartik Rajput wrote: ... > > > > > +     for (i = 0; i < len; i++) { > > > > > +             if (!nbcon_enter_unsafe(wctxt)) > > > > > +                     break; > > > > > + > > > > > +             read_poll_timeout_atomic(tegra_utc_tx_readl, val, > > > > > !(val & TEGRA_UTC_FIFO_FULL), > > > > > +                                      0, USEC_PER_SEC, false, > > > > > tup, > > > > > TEGRA_UTC_FIFO_STATUS); > > > > > > > > No error check? > > > > > > I'm not sure about this. The case where the TX FIFO doesn't clear > > > up, > > > even after polling for 1 second, is highly unlikely, especially > > > since > > > there's no flow control involved here. Even if that did happen, > > > writing > > > to the TX FIFO should just result in an overflow, which is probably > > > acceptable in this scenario. > > > > Perhaps a warning (debug?) message in such a case? > > I would prefer avoiding any prints in this function, as we are writing > debug messages to the UART HW here. Not every printf() goes to UART, but to your point the NBCON should solve that issue to some extent. Of course, if the HW in a broken (unrecoverable) state, nothing won't help. > > > > > +             uart_console_write(&tup->port, wctxt->outbuf + i, > > > > > 1, > > > > > tegra_utc_console_putchar); > > > > > + > > > > > +             if (!nbcon_exit_unsafe(wctxt)) > > > > > +                     break; > > > > > +     } -- With Best Regards, Andy Shevchenko