* [PATCH] arm64: dts: qcom: x1e80100: Add crypto engine @ 2025-02-13 12:44 Abel Vesa 2025-02-13 13:18 ` Stephan Gerhold 2025-02-13 17:22 ` Rob Herring (Arm) 0 siblings, 2 replies; 6+ messages in thread From: Abel Vesa @ 2025-02-13 12:44 UTC (permalink / raw) To: Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski, Conor Dooley Cc: Johan Hovold, linux-arm-msm, devicetree, linux-kernel, Abel Vesa On X Elite, there is a crypto engine IP block similar to ones found on SM8x50 platforms. Describe the crypto engine and its BAM. Signed-off-by: Abel Vesa <abel.vesa@linaro.org> --- https://lore.kernel.org/all/20250213-dt-bindings-qcom-qce-x1e80100-v1-1-d17ef73a1c12@linaro.org/ --- arch/arm64/boot/dts/qcom/x1e80100.dtsi | 30 ++++++++++++++++++++++++++++++ 1 file changed, 30 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/x1e80100.dtsi b/arch/arm64/boot/dts/qcom/x1e80100.dtsi index 9d38436763432892ceef95daf0335d4cf446357c..5a2c5dd1dc2950b918af23c0939a112cbe47398b 100644 --- a/arch/arm64/boot/dts/qcom/x1e80100.dtsi +++ b/arch/arm64/boot/dts/qcom/x1e80100.dtsi @@ -3708,6 +3708,36 @@ pcie4_phy: phy@1c0e000 { status = "disabled"; }; + cryptobam: dma-controller@1dc4000 { + compatible = "qcom,bam-v1.7.0"; + reg = <0 0x01dc4000 0 0x28000>; + + interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>; + + #dma-cells = <1>; + + iommus = <&apps_smmu 0x480 0>, + <&apps_smmu 0x481 0>; + + qcom,ee = <0>; + qcom,controlled-remotely; + }; + + crypto: crypto@1dfa000 { + compatible = "qcom,x1e80100-qce", "qcom,sm8150-qce", "qcom,qce"; + reg = <0 0x01dfa000 0 0x6000>; + + interconnects = <&aggre2_noc MASTER_CRYPTO QCOM_ICC_TAG_ALWAYS + &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>; + interconnect-names = "memory"; + + dmas = <&cryptobam 4>, <&cryptobam 5>; + dma-names = "rx", "tx"; + + iommus = <&apps_smmu 0x480 0>, + <&apps_smmu 0x481 0>; + }; + tcsr_mutex: hwlock@1f40000 { compatible = "qcom,tcsr-mutex"; reg = <0 0x01f40000 0 0x20000>; --- base-commit: 7b7a883c7f4de1ee5040bd1c32aabaafde54d209 change-id: 20250213-x1e80100-crypto-18c7d14cd459 Best regards, -- Abel Vesa <abel.vesa@linaro.org> ^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCH] arm64: dts: qcom: x1e80100: Add crypto engine 2025-02-13 12:44 [PATCH] arm64: dts: qcom: x1e80100: Add crypto engine Abel Vesa @ 2025-02-13 13:18 ` Stephan Gerhold 2025-02-13 13:20 ` Stephan Gerhold ` (2 more replies) 2025-02-13 17:22 ` Rob Herring (Arm) 1 sibling, 3 replies; 6+ messages in thread From: Stephan Gerhold @ 2025-02-13 13:18 UTC (permalink / raw) To: Abel Vesa Cc: Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Johan Hovold, linux-arm-msm, devicetree, linux-kernel On Thu, Feb 13, 2025 at 02:44:02PM +0200, Abel Vesa wrote: > On X Elite, there is a crypto engine IP block similar to ones found on > SM8x50 platforms. > > Describe the crypto engine and its BAM. > > Signed-off-by: Abel Vesa <abel.vesa@linaro.org> > --- > https://lore.kernel.org/all/20250213-dt-bindings-qcom-qce-x1e80100-v1-1-d17ef73a1c12@linaro.org/ > --- > arch/arm64/boot/dts/qcom/x1e80100.dtsi | 30 ++++++++++++++++++++++++++++++ > 1 file changed, 30 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/x1e80100.dtsi b/arch/arm64/boot/dts/qcom/x1e80100.dtsi > index 9d38436763432892ceef95daf0335d4cf446357c..5a2c5dd1dc2950b918af23c0939a112cbe47398b 100644 > --- a/arch/arm64/boot/dts/qcom/x1e80100.dtsi > +++ b/arch/arm64/boot/dts/qcom/x1e80100.dtsi > @@ -3708,6 +3708,36 @@ pcie4_phy: phy@1c0e000 { > status = "disabled"; > }; > > + cryptobam: dma-controller@1dc4000 { > + compatible = "qcom,bam-v1.7.0"; Hm, I would expect this is at least "qcom,bam-v1.7.4", "qcom,bam-v1.7.0" given that this is a pretty recent SoC. I don't think this makes any functional difference though, and we don't seem to have it on other recent SoCs... > + reg = <0 0x01dc4000 0 0x28000>; > + > + interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>; > + > + #dma-cells = <1>; > + > + iommus = <&apps_smmu 0x480 0>, > + <&apps_smmu 0x481 0>; Should be same as <&apps_smmu 0x480 0x1> (0x1 is applied as mask to the SID, and 0x481 & ~0x1 = 0x480). > + > + qcom,ee = <0>; > + qcom,controlled-remotely; Please add "num-channels" and "qcom,num-ees". Otherwise you risk causing crashes if the interconnect listed below isn't up (anymore) when the driver probes the device. See: https://lore.kernel.org/linux-arm-msm/20250213-x1e80100-crypto-v1-1-f93afdd4025a@linaro.org/T/ > + }; > + > + crypto: crypto@1dfa000 { > + compatible = "qcom,x1e80100-qce", "qcom,sm8150-qce", "qcom,qce"; > + reg = <0 0x01dfa000 0 0x6000>; > + > + interconnects = <&aggre2_noc MASTER_CRYPTO QCOM_ICC_TAG_ALWAYS > + &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>; > + interconnect-names = "memory"; > + > + dmas = <&cryptobam 4>, <&cryptobam 5>; > + dma-names = "rx", "tx"; > + > + iommus = <&apps_smmu 0x480 0>, > + <&apps_smmu 0x481 0>; <&apps_smmu 0x480 0x1>; Thanks, Stephan ^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH] arm64: dts: qcom: x1e80100: Add crypto engine 2025-02-13 13:18 ` Stephan Gerhold @ 2025-02-13 13:20 ` Stephan Gerhold 2025-02-13 13:53 ` Konrad Dybcio 2025-02-21 12:47 ` Abel Vesa 2 siblings, 0 replies; 6+ messages in thread From: Stephan Gerhold @ 2025-02-13 13:20 UTC (permalink / raw) To: Abel Vesa Cc: Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Johan Hovold, linux-arm-msm, devicetree, linux-kernel On Thu, Feb 13, 2025 at 02:18:09PM +0100, Stephan Gerhold wrote: > On Thu, Feb 13, 2025 at 02:44:02PM +0200, Abel Vesa wrote: > > On X Elite, there is a crypto engine IP block similar to ones found on > > SM8x50 platforms. > > > > Describe the crypto engine and its BAM. > > > > Signed-off-by: Abel Vesa <abel.vesa@linaro.org> > > --- > > https://lore.kernel.org/all/20250213-dt-bindings-qcom-qce-x1e80100-v1-1-d17ef73a1c12@linaro.org/ > > --- > > arch/arm64/boot/dts/qcom/x1e80100.dtsi | 30 ++++++++++++++++++++++++++++++ > > 1 file changed, 30 insertions(+) > > > > diff --git a/arch/arm64/boot/dts/qcom/x1e80100.dtsi b/arch/arm64/boot/dts/qcom/x1e80100.dtsi > > index 9d38436763432892ceef95daf0335d4cf446357c..5a2c5dd1dc2950b918af23c0939a112cbe47398b 100644 > > --- a/arch/arm64/boot/dts/qcom/x1e80100.dtsi > > +++ b/arch/arm64/boot/dts/qcom/x1e80100.dtsi > > @@ -3708,6 +3708,36 @@ pcie4_phy: phy@1c0e000 { > > status = "disabled"; > > }; > > > > + cryptobam: dma-controller@1dc4000 { > > + compatible = "qcom,bam-v1.7.0"; > > Hm, I would expect this is at least "qcom,bam-v1.7.4", "qcom,bam-v1.7.0" > given that this is a pretty recent SoC. I don't think this makes any > functional difference though, and we don't seem to have it on other > recent SoCs... > > > + reg = <0 0x01dc4000 0 0x28000>; > > + > > + interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>; > > + > > + #dma-cells = <1>; > > + > > + iommus = <&apps_smmu 0x480 0>, > > + <&apps_smmu 0x481 0>; > > Should be same as <&apps_smmu 0x480 0x1> (0x1 is applied as mask to the > SID, and 0x481 & ~0x1 = 0x480). > > > + > > + qcom,ee = <0>; > > + qcom,controlled-remotely; > > Please add "num-channels" and "qcom,num-ees". Otherwise you risk causing > crashes if the interconnect listed below isn't up (anymore) when the > driver probes the device. See: > https://lore.kernel.org/linux-arm-msm/20250213-x1e80100-crypto-v1-1-f93afdd4025a@linaro.org/T/ Sorry, I meant: https://lore.kernel.org/linux-arm-msm/20250212-bam-dma-fixes-v1-0-f560889e65d8@linaro.org/T/ Oops. Stephan ^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH] arm64: dts: qcom: x1e80100: Add crypto engine 2025-02-13 13:18 ` Stephan Gerhold 2025-02-13 13:20 ` Stephan Gerhold @ 2025-02-13 13:53 ` Konrad Dybcio 2025-02-21 12:47 ` Abel Vesa 2 siblings, 0 replies; 6+ messages in thread From: Konrad Dybcio @ 2025-02-13 13:53 UTC (permalink / raw) To: Stephan Gerhold, Abel Vesa Cc: Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Johan Hovold, linux-arm-msm, devicetree, linux-kernel On 13.02.2025 2:18 PM, Stephan Gerhold wrote: > On Thu, Feb 13, 2025 at 02:44:02PM +0200, Abel Vesa wrote: >> On X Elite, there is a crypto engine IP block similar to ones found on >> SM8x50 platforms. >> >> Describe the crypto engine and its BAM. >> >> Signed-off-by: Abel Vesa <abel.vesa@linaro.org> >> --- >> https://lore.kernel.org/all/20250213-dt-bindings-qcom-qce-x1e80100-v1-1-d17ef73a1c12@linaro.org/ >> --- >> arch/arm64/boot/dts/qcom/x1e80100.dtsi | 30 ++++++++++++++++++++++++++++++ >> 1 file changed, 30 insertions(+) >> >> diff --git a/arch/arm64/boot/dts/qcom/x1e80100.dtsi b/arch/arm64/boot/dts/qcom/x1e80100.dtsi >> index 9d38436763432892ceef95daf0335d4cf446357c..5a2c5dd1dc2950b918af23c0939a112cbe47398b 100644 >> --- a/arch/arm64/boot/dts/qcom/x1e80100.dtsi >> +++ b/arch/arm64/boot/dts/qcom/x1e80100.dtsi >> @@ -3708,6 +3708,36 @@ pcie4_phy: phy@1c0e000 { >> status = "disabled"; >> }; >> >> + cryptobam: dma-controller@1dc4000 { >> + compatible = "qcom,bam-v1.7.0"; > > Hm, I would expect this is at least "qcom,bam-v1.7.4", "qcom,bam-v1.7.0" > given that this is a pretty recent SoC. I don't think this makes any > functional difference though, and we don't seem to have it on other > recent SoCs... It is v1.7.4 fwiw Konrad ^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH] arm64: dts: qcom: x1e80100: Add crypto engine 2025-02-13 13:18 ` Stephan Gerhold 2025-02-13 13:20 ` Stephan Gerhold 2025-02-13 13:53 ` Konrad Dybcio @ 2025-02-21 12:47 ` Abel Vesa 2 siblings, 0 replies; 6+ messages in thread From: Abel Vesa @ 2025-02-21 12:47 UTC (permalink / raw) To: Stephan Gerhold Cc: Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Johan Hovold, linux-arm-msm, devicetree, linux-kernel On 25-02-13 14:18:09, Stephan Gerhold wrote: > On Thu, Feb 13, 2025 at 02:44:02PM +0200, Abel Vesa wrote: > > On X Elite, there is a crypto engine IP block similar to ones found on > > SM8x50 platforms. > > > > Describe the crypto engine and its BAM. > > > > Signed-off-by: Abel Vesa <abel.vesa@linaro.org> > > --- > > https://lore.kernel.org/all/20250213-dt-bindings-qcom-qce-x1e80100-v1-1-d17ef73a1c12@linaro.org/ > > --- > > arch/arm64/boot/dts/qcom/x1e80100.dtsi | 30 ++++++++++++++++++++++++++++++ > > 1 file changed, 30 insertions(+) > > > > diff --git a/arch/arm64/boot/dts/qcom/x1e80100.dtsi b/arch/arm64/boot/dts/qcom/x1e80100.dtsi > > index 9d38436763432892ceef95daf0335d4cf446357c..5a2c5dd1dc2950b918af23c0939a112cbe47398b 100644 > > --- a/arch/arm64/boot/dts/qcom/x1e80100.dtsi > > +++ b/arch/arm64/boot/dts/qcom/x1e80100.dtsi > > @@ -3708,6 +3708,36 @@ pcie4_phy: phy@1c0e000 { > > status = "disabled"; > > }; > > > > + cryptobam: dma-controller@1dc4000 { > > + compatible = "qcom,bam-v1.7.0"; > > Hm, I would expect this is at least "qcom,bam-v1.7.4", "qcom,bam-v1.7.0" > given that this is a pretty recent SoC. I don't think this makes any > functional difference though, and we don't seem to have it on other > recent SoCs... Yep, will add both compatibles as suggested. > > > + reg = <0 0x01dc4000 0 0x28000>; > > + > > + interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>; > > + > > + #dma-cells = <1>; > > + > > + iommus = <&apps_smmu 0x480 0>, > > + <&apps_smmu 0x481 0>; > > Should be same as <&apps_smmu 0x480 0x1> (0x1 is applied as mask to the > SID, and 0x481 & ~0x1 = 0x480). Nope, the mask is on bit 16 through 31. That will result in different sid. > > > + > > + qcom,ee = <0>; > > + qcom,controlled-remotely; > > Please add "num-channels" and "qcom,num-ees". Otherwise you risk causing > crashes if the interconnect listed below isn't up (anymore) when the > driver probes the device. See: > https://lore.kernel.org/linux-arm-msm/20250213-x1e80100-crypto-v1-1-f93afdd4025a@linaro.org/T/ Sure. Will do. This platform has 7 EEs and 30 channels according to documentation. > > > + }; > > + > > + crypto: crypto@1dfa000 { > > + compatible = "qcom,x1e80100-qce", "qcom,sm8150-qce", "qcom,qce"; > > + reg = <0 0x01dfa000 0 0x6000>; > > + > > + interconnects = <&aggre2_noc MASTER_CRYPTO QCOM_ICC_TAG_ALWAYS > > + &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>; > > + interconnect-names = "memory"; > > + > > + dmas = <&cryptobam 4>, <&cryptobam 5>; > > + dma-names = "rx", "tx"; > > + > > + iommus = <&apps_smmu 0x480 0>, > > + <&apps_smmu 0x481 0>; > > <&apps_smmu 0x480 0x1>; See above. > > Thanks, > Stephan Thanks for reviewing. Abel ^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH] arm64: dts: qcom: x1e80100: Add crypto engine 2025-02-13 12:44 [PATCH] arm64: dts: qcom: x1e80100: Add crypto engine Abel Vesa 2025-02-13 13:18 ` Stephan Gerhold @ 2025-02-13 17:22 ` Rob Herring (Arm) 1 sibling, 0 replies; 6+ messages in thread From: Rob Herring (Arm) @ 2025-02-13 17:22 UTC (permalink / raw) To: Abel Vesa Cc: Conor Dooley, linux-kernel, Bjorn Andersson, Konrad Dybcio, linux-arm-msm, Krzysztof Kozlowski, Johan Hovold, devicetree On Thu, 13 Feb 2025 14:44:02 +0200, Abel Vesa wrote: > On X Elite, there is a crypto engine IP block similar to ones found on > SM8x50 platforms. > > Describe the crypto engine and its BAM. > > Signed-off-by: Abel Vesa <abel.vesa@linaro.org> > --- > https://lore.kernel.org/all/20250213-dt-bindings-qcom-qce-x1e80100-v1-1-d17ef73a1c12@linaro.org/ > --- > arch/arm64/boot/dts/qcom/x1e80100.dtsi | 30 ++++++++++++++++++++++++++++++ > 1 file changed, 30 insertions(+) > My bot found new DTB warnings on the .dts files added or changed in this series. Some warnings may be from an existing SoC .dtsi. Or perhaps the warnings are fixed by another series. Ultimately, it is up to the platform maintainer whether these warnings are acceptable or not. No need to reply unless the platform maintainer has comments. If you already ran DT checks and didn't see these error(s), then make sure dt-schema is up to date: pip3 install dtschema --upgrade New warnings running 'make CHECK_DTBS=y for arch/arm64/boot/dts/qcom/' for 20250213-x1e80100-crypto-v1-1-f93afdd4025a@linaro.org: arch/arm64/boot/dts/qcom/x1e80100-dell-xps13-9345.dtb: crypto@1dfa000: compatible: 'oneOf' conditional failed, one must be fixed: ['qcom,x1e80100-qce', 'qcom,sm8150-qce', 'qcom,qce'] is too long 'qcom,crypto-v5.1' was expected 'qcom,crypto-v5.4' was expected 'qcom,x1e80100-qce' is not one of ['qcom,ipq4019-qce', 'qcom,sm8150-qce'] 'qcom,x1e80100-qce' is not one of ['qcom,ipq6018-qce', 'qcom,ipq8074-qce', 'qcom,ipq9574-qce', 'qcom,msm8996-qce', 'qcom,qcm2290-qce', 'qcom,sdm845-qce', 'qcom,sm6115-qce'] 'qcom,x1e80100-qce' is not one of ['qcom,qcs8300-qce', 'qcom,sa8775p-qce', 'qcom,sc7280-qce', 'qcom,sm6350-qce', 'qcom,sm8250-qce', 'qcom,sm8350-qce', 'qcom,sm8450-qce', 'qcom,sm8550-qce', 'qcom,sm8650-qce', 'qcom,sm8750-qce'] 'qcom,qce' was expected 'qcom,ipq4019-qce' was expected from schema $id: http://devicetree.org/schemas/crypto/qcom-qce.yaml# arch/arm64/boot/dts/qcom/x1e80100-dell-xps13-9345.dtb: /soc@0/crypto@1dfa000: failed to match any schema with compatible: ['qcom,x1e80100-qce', 'qcom,sm8150-qce', 'qcom,qce'] arch/arm64/boot/dts/qcom/x1e80100-lenovo-yoga-slim7x.dtb: crypto@1dfa000: compatible: 'oneOf' conditional failed, one must be fixed: ['qcom,x1e80100-qce', 'qcom,sm8150-qce', 'qcom,qce'] is too long 'qcom,crypto-v5.1' was expected 'qcom,crypto-v5.4' was expected 'qcom,x1e80100-qce' is not one of ['qcom,ipq4019-qce', 'qcom,sm8150-qce'] 'qcom,x1e80100-qce' is not one of ['qcom,ipq6018-qce', 'qcom,ipq8074-qce', 'qcom,ipq9574-qce', 'qcom,msm8996-qce', 'qcom,qcm2290-qce', 'qcom,sdm845-qce', 'qcom,sm6115-qce'] 'qcom,x1e80100-qce' is not one of ['qcom,qcs8300-qce', 'qcom,sa8775p-qce', 'qcom,sc7280-qce', 'qcom,sm6350-qce', 'qcom,sm8250-qce', 'qcom,sm8350-qce', 'qcom,sm8450-qce', 'qcom,sm8550-qce', 'qcom,sm8650-qce', 'qcom,sm8750-qce'] 'qcom,qce' was expected 'qcom,ipq4019-qce' was expected from schema $id: http://devicetree.org/schemas/crypto/qcom-qce.yaml# arch/arm64/boot/dts/qcom/x1e80100-lenovo-yoga-slim7x.dtb: /soc@0/crypto@1dfa000: failed to match any schema with compatible: ['qcom,x1e80100-qce', 'qcom,sm8150-qce', 'qcom,qce'] arch/arm64/boot/dts/qcom/x1e001de-devkit.dtb: crypto@1dfa000: compatible: 'oneOf' conditional failed, one must be fixed: ['qcom,x1e80100-qce', 'qcom,sm8150-qce', 'qcom,qce'] is too long 'qcom,crypto-v5.1' was expected 'qcom,crypto-v5.4' was expected 'qcom,x1e80100-qce' is not one of ['qcom,ipq4019-qce', 'qcom,sm8150-qce'] 'qcom,x1e80100-qce' is not one of ['qcom,ipq6018-qce', 'qcom,ipq8074-qce', 'qcom,ipq9574-qce', 'qcom,msm8996-qce', 'qcom,qcm2290-qce', 'qcom,sdm845-qce', 'qcom,sm6115-qce'] 'qcom,x1e80100-qce' is not one of ['qcom,qcs8300-qce', 'qcom,sa8775p-qce', 'qcom,sc7280-qce', 'qcom,sm6350-qce', 'qcom,sm8250-qce', 'qcom,sm8350-qce', 'qcom,sm8450-qce', 'qcom,sm8550-qce', 'qcom,sm8650-qce', 'qcom,sm8750-qce'] 'qcom,qce' was expected 'qcom,ipq4019-qce' was expected from schema $id: http://devicetree.org/schemas/crypto/qcom-qce.yaml# arch/arm64/boot/dts/qcom/x1e001de-devkit.dtb: /soc@0/crypto@1dfa000: failed to match any schema with compatible: ['qcom,x1e80100-qce', 'qcom,sm8150-qce', 'qcom,qce'] arch/arm64/boot/dts/qcom/x1e80100-hp-omnibook-x14.dtb: crypto@1dfa000: compatible: 'oneOf' conditional failed, one must be fixed: ['qcom,x1e80100-qce', 'qcom,sm8150-qce', 'qcom,qce'] is too long 'qcom,crypto-v5.1' was expected 'qcom,crypto-v5.4' was expected 'qcom,x1e80100-qce' is not one of ['qcom,ipq4019-qce', 'qcom,sm8150-qce'] 'qcom,x1e80100-qce' is not one of ['qcom,ipq6018-qce', 'qcom,ipq8074-qce', 'qcom,ipq9574-qce', 'qcom,msm8996-qce', 'qcom,qcm2290-qce', 'qcom,sdm845-qce', 'qcom,sm6115-qce'] 'qcom,x1e80100-qce' is not one of ['qcom,qcs8300-qce', 'qcom,sa8775p-qce', 'qcom,sc7280-qce', 'qcom,sm6350-qce', 'qcom,sm8250-qce', 'qcom,sm8350-qce', 'qcom,sm8450-qce', 'qcom,sm8550-qce', 'qcom,sm8650-qce', 'qcom,sm8750-qce'] 'qcom,qce' was expected 'qcom,ipq4019-qce' was expected from schema $id: http://devicetree.org/schemas/crypto/qcom-qce.yaml# arch/arm64/boot/dts/qcom/x1e80100-hp-omnibook-x14.dtb: /soc@0/crypto@1dfa000: failed to match any schema with compatible: ['qcom,x1e80100-qce', 'qcom,sm8150-qce', 'qcom,qce'] arch/arm64/boot/dts/qcom/x1e80100-qcp.dtb: crypto@1dfa000: compatible: 'oneOf' conditional failed, one must be fixed: ['qcom,x1e80100-qce', 'qcom,sm8150-qce', 'qcom,qce'] is too long 'qcom,crypto-v5.1' was expected 'qcom,crypto-v5.4' was expected 'qcom,x1e80100-qce' is not one of ['qcom,ipq4019-qce', 'qcom,sm8150-qce'] 'qcom,x1e80100-qce' is not one of ['qcom,ipq6018-qce', 'qcom,ipq8074-qce', 'qcom,ipq9574-qce', 'qcom,msm8996-qce', 'qcom,qcm2290-qce', 'qcom,sdm845-qce', 'qcom,sm6115-qce'] 'qcom,x1e80100-qce' is not one of ['qcom,qcs8300-qce', 'qcom,sa8775p-qce', 'qcom,sc7280-qce', 'qcom,sm6350-qce', 'qcom,sm8250-qce', 'qcom,sm8350-qce', 'qcom,sm8450-qce', 'qcom,sm8550-qce', 'qcom,sm8650-qce', 'qcom,sm8750-qce'] 'qcom,qce' was expected 'qcom,ipq4019-qce' was expected from schema $id: http://devicetree.org/schemas/crypto/qcom-qce.yaml# arch/arm64/boot/dts/qcom/x1e80100-qcp.dtb: /soc@0/crypto@1dfa000: failed to match any schema with compatible: ['qcom,x1e80100-qce', 'qcom,sm8150-qce', 'qcom,qce'] arch/arm64/boot/dts/qcom/x1e80100-asus-vivobook-s15.dtb: crypto@1dfa000: compatible: 'oneOf' conditional failed, one must be fixed: ['qcom,x1e80100-qce', 'qcom,sm8150-qce', 'qcom,qce'] is too long 'qcom,crypto-v5.1' was expected 'qcom,crypto-v5.4' was expected 'qcom,x1e80100-qce' is not one of ['qcom,ipq4019-qce', 'qcom,sm8150-qce'] 'qcom,x1e80100-qce' is not one of ['qcom,ipq6018-qce', 'qcom,ipq8074-qce', 'qcom,ipq9574-qce', 'qcom,msm8996-qce', 'qcom,qcm2290-qce', 'qcom,sdm845-qce', 'qcom,sm6115-qce'] 'qcom,x1e80100-qce' is not one of ['qcom,qcs8300-qce', 'qcom,sa8775p-qce', 'qcom,sc7280-qce', 'qcom,sm6350-qce', 'qcom,sm8250-qce', 'qcom,sm8350-qce', 'qcom,sm8450-qce', 'qcom,sm8550-qce', 'qcom,sm8650-qce', 'qcom,sm8750-qce'] 'qcom,qce' was expected 'qcom,ipq4019-qce' was expected from schema $id: http://devicetree.org/schemas/crypto/qcom-qce.yaml# arch/arm64/boot/dts/qcom/x1e80100-asus-vivobook-s15.dtb: /soc@0/crypto@1dfa000: failed to match any schema with compatible: ['qcom,x1e80100-qce', 'qcom,sm8150-qce', 'qcom,qce'] arch/arm64/boot/dts/qcom/x1e78100-lenovo-thinkpad-t14s.dtb: crypto@1dfa000: compatible: 'oneOf' conditional failed, one must be fixed: ['qcom,x1e80100-qce', 'qcom,sm8150-qce', 'qcom,qce'] is too long 'qcom,crypto-v5.1' was expected 'qcom,crypto-v5.4' was expected 'qcom,x1e80100-qce' is not one of ['qcom,ipq4019-qce', 'qcom,sm8150-qce'] 'qcom,x1e80100-qce' is not one of ['qcom,ipq6018-qce', 'qcom,ipq8074-qce', 'qcom,ipq9574-qce', 'qcom,msm8996-qce', 'qcom,qcm2290-qce', 'qcom,sdm845-qce', 'qcom,sm6115-qce'] 'qcom,x1e80100-qce' is not one of ['qcom,qcs8300-qce', 'qcom,sa8775p-qce', 'qcom,sc7280-qce', 'qcom,sm6350-qce', 'qcom,sm8250-qce', 'qcom,sm8350-qce', 'qcom,sm8450-qce', 'qcom,sm8550-qce', 'qcom,sm8650-qce', 'qcom,sm8750-qce'] 'qcom,qce' was expected 'qcom,ipq4019-qce' was expected from schema $id: http://devicetree.org/schemas/crypto/qcom-qce.yaml# arch/arm64/boot/dts/qcom/x1e78100-lenovo-thinkpad-t14s.dtb: /soc@0/crypto@1dfa000: failed to match any schema with compatible: ['qcom,x1e80100-qce', 'qcom,sm8150-qce', 'qcom,qce'] arch/arm64/boot/dts/qcom/x1e80100-microsoft-romulus15.dtb: crypto@1dfa000: compatible: 'oneOf' conditional failed, one must be fixed: ['qcom,x1e80100-qce', 'qcom,sm8150-qce', 'qcom,qce'] is too long 'qcom,crypto-v5.1' was expected 'qcom,crypto-v5.4' was expected 'qcom,x1e80100-qce' is not one of ['qcom,ipq4019-qce', 'qcom,sm8150-qce'] 'qcom,x1e80100-qce' is not one of ['qcom,ipq6018-qce', 'qcom,ipq8074-qce', 'qcom,ipq9574-qce', 'qcom,msm8996-qce', 'qcom,qcm2290-qce', 'qcom,sdm845-qce', 'qcom,sm6115-qce'] 'qcom,x1e80100-qce' is not one of ['qcom,qcs8300-qce', 'qcom,sa8775p-qce', 'qcom,sc7280-qce', 'qcom,sm6350-qce', 'qcom,sm8250-qce', 'qcom,sm8350-qce', 'qcom,sm8450-qce', 'qcom,sm8550-qce', 'qcom,sm8650-qce', 'qcom,sm8750-qce'] 'qcom,qce' was expected 'qcom,ipq4019-qce' was expected from schema $id: http://devicetree.org/schemas/crypto/qcom-qce.yaml# arch/arm64/boot/dts/qcom/x1e80100-microsoft-romulus15.dtb: /soc@0/crypto@1dfa000: failed to match any schema with compatible: ['qcom,x1e80100-qce', 'qcom,sm8150-qce', 'qcom,qce'] arch/arm64/boot/dts/qcom/x1e80100-crd.dtb: crypto@1dfa000: compatible: 'oneOf' conditional failed, one must be fixed: ['qcom,x1e80100-qce', 'qcom,sm8150-qce', 'qcom,qce'] is too long 'qcom,crypto-v5.1' was expected 'qcom,crypto-v5.4' was expected 'qcom,x1e80100-qce' is not one of ['qcom,ipq4019-qce', 'qcom,sm8150-qce'] 'qcom,x1e80100-qce' is not one of ['qcom,ipq6018-qce', 'qcom,ipq8074-qce', 'qcom,ipq9574-qce', 'qcom,msm8996-qce', 'qcom,qcm2290-qce', 'qcom,sdm845-qce', 'qcom,sm6115-qce'] 'qcom,x1e80100-qce' is not one of ['qcom,qcs8300-qce', 'qcom,sa8775p-qce', 'qcom,sc7280-qce', 'qcom,sm6350-qce', 'qcom,sm8250-qce', 'qcom,sm8350-qce', 'qcom,sm8450-qce', 'qcom,sm8550-qce', 'qcom,sm8650-qce', 'qcom,sm8750-qce'] 'qcom,qce' was expected 'qcom,ipq4019-qce' was expected from schema $id: http://devicetree.org/schemas/crypto/qcom-qce.yaml# arch/arm64/boot/dts/qcom/x1e80100-crd.dtb: /soc@0/crypto@1dfa000: failed to match any schema with compatible: ['qcom,x1e80100-qce', 'qcom,sm8150-qce', 'qcom,qce'] arch/arm64/boot/dts/qcom/x1e80100-microsoft-romulus13.dtb: crypto@1dfa000: compatible: 'oneOf' conditional failed, one must be fixed: ['qcom,x1e80100-qce', 'qcom,sm8150-qce', 'qcom,qce'] is too long 'qcom,crypto-v5.1' was expected 'qcom,crypto-v5.4' was expected 'qcom,x1e80100-qce' is not one of ['qcom,ipq4019-qce', 'qcom,sm8150-qce'] 'qcom,x1e80100-qce' is not one of ['qcom,ipq6018-qce', 'qcom,ipq8074-qce', 'qcom,ipq9574-qce', 'qcom,msm8996-qce', 'qcom,qcm2290-qce', 'qcom,sdm845-qce', 'qcom,sm6115-qce'] 'qcom,x1e80100-qce' is not one of ['qcom,qcs8300-qce', 'qcom,sa8775p-qce', 'qcom,sc7280-qce', 'qcom,sm6350-qce', 'qcom,sm8250-qce', 'qcom,sm8350-qce', 'qcom,sm8450-qce', 'qcom,sm8550-qce', 'qcom,sm8650-qce', 'qcom,sm8750-qce'] 'qcom,qce' was expected 'qcom,ipq4019-qce' was expected from schema $id: http://devicetree.org/schemas/crypto/qcom-qce.yaml# arch/arm64/boot/dts/qcom/x1e80100-microsoft-romulus13.dtb: /soc@0/crypto@1dfa000: failed to match any schema with compatible: ['qcom,x1e80100-qce', 'qcom,sm8150-qce', 'qcom,qce'] ^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2025-02-21 12:47 UTC | newest] Thread overview: 6+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2025-02-13 12:44 [PATCH] arm64: dts: qcom: x1e80100: Add crypto engine Abel Vesa 2025-02-13 13:18 ` Stephan Gerhold 2025-02-13 13:20 ` Stephan Gerhold 2025-02-13 13:53 ` Konrad Dybcio 2025-02-21 12:47 ` Abel Vesa 2025-02-13 17:22 ` Rob Herring (Arm)
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