From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 196BA18DB37; Mon, 17 Feb 2025 12:19:02 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739794743; cv=none; b=jYm0vk/D5h79EpR5M50012rHUPSVF8RcG7wReQSo+jHzT3Q1N5GO9fMKNjuGk1KD8dN6jjnNwJL/sHNg63LIG/S8HZBqPc+eln44rvAITYwHj/g6vfWnu7ik9RPKsvkgEwLOGpM9c0dycY8X5wj5yrH5U8G0ZXeN7/3fiIVBmCo= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739794743; c=relaxed/simple; bh=wyEMxJSE4ut2qD9vvgKYF1uHbf5olLm7PCB7mopaezc=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=jRTNw8sV+SMEejLtrYPLL82eePjXyNoWuz434iFr1/b2sU8JN4Kc3qcxBZU4iCKXEyW1AXf4LPDxv2zmuk1cHSw/nCYwEjwFzv2IFKtCndqL+WY4i9L9n/RMykLG15QPzffuGPTzi3kmS+E/pUTe7ZVTXwsvV6xrApo+7RHCnqs= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=Zj3zJVGL; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="Zj3zJVGL" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 256D2C4CED1; Mon, 17 Feb 2025 12:19:01 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1739794742; bh=wyEMxJSE4ut2qD9vvgKYF1uHbf5olLm7PCB7mopaezc=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=Zj3zJVGLaouZLXnzIJXFuNsrKpMsmPoeDnw9lLcRLibpLL+oIqHjoQnx53/NpJMaT 1obkaYTrOUIoO+baSTIgHL3v+87w0VtQxnnPh71a6wpmwuy0OlH/uutPpBt2ASdEXw Y1a2lkUKXWaHGBHR/ao6nkcEvLaBe4SbvJCu0rwZySIQcJfLNqJO6AtZsIjlcQXqAt FJ1jA4lLVpjCBWk1vSr7bY0oGqyJx9vu4bR5NYF+SFaWIvvWyyTLhAXMr3Qb/A0wlo GUzWRedJnc7Q4WYfKXUEGhiklHWnDqROR2KlwtKY5zO7ZIHZUhEBsP01yqAW2DqRha b95ToCfNsaezA== Date: Mon, 17 Feb 2025 13:19:00 +0100 From: Lorenzo Bianconi To: Manivannan Sadhasivam Cc: Ryder Lee , Jianjun Wang , Lorenzo Pieralisi , Krzysztof =?utf-8?Q?Wilczy=C5=84ski?= , Rob Herring , Bjorn Helgaas , Krzysztof Kozlowski , Conor Dooley , Matthias Brugger , AngeloGioacchino Del Regno , linux-pci@vger.kernel.org, linux-mediatek@lists.infradead.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: Re: [PATCH v2 2/2] PCI: mediatek-gen3: Configure PBUS_CSR registers for EN7581 SoC Message-ID: References: <20250202-en7581-pcie-pbus-csr-v2-0-65dcb201c9a9@kernel.org> <20250202-en7581-pcie-pbus-csr-v2-2-65dcb201c9a9@kernel.org> <20250214171106.ul3fwzcwhadhdwhj@thinkpad> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha512; protocol="application/pgp-signature"; boundary="2DDNq2ksAqtJIqnN" Content-Disposition: inline In-Reply-To: <20250214171106.ul3fwzcwhadhdwhj@thinkpad> --2DDNq2ksAqtJIqnN Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: quoted-printable > On Sun, Feb 02, 2025 at 08:34:24PM +0100, Lorenzo Bianconi wrote: > > Configure PBus base address and address mask to allow the hw > > to detect if a given address is on PCIE0, PCIE1 or PCIE2. > >=20 > > Signed-off-by: Lorenzo Bianconi > > --- > > drivers/pci/controller/pcie-mediatek-gen3.c | 30 +++++++++++++++++++++= +++++++- > > 1 file changed, 29 insertions(+), 1 deletion(-) > >=20 > > diff --git a/drivers/pci/controller/pcie-mediatek-gen3.c b/drivers/pci/= controller/pcie-mediatek-gen3.c > > index aa24ac9aaecc749b53cfc4faf6399913d20cdbf2..9c2a592cae959de8fbe9ca5= c5c2253f8eadf2c76 100644 > > --- a/drivers/pci/controller/pcie-mediatek-gen3.c > > +++ b/drivers/pci/controller/pcie-mediatek-gen3.c > > @@ -15,6 +15,7 @@ > > #include > > #include > > #include > > +#include > > #include > > #include > > #include > > @@ -24,6 +25,7 @@ > > #include > > #include > > #include > > +#include > > #include > > =20 > > #include "../pci.h" > > @@ -127,6 +129,13 @@ > > =20 > > #define PCIE_MTK_RESET_TIME_US 10 > > =20 > > +#define PCIE_EN7581_PBUS_ADDR(_n) (0x00 + ((_n) << 3)) > > +#define PCIE_EN7581_PBUS_ADDR_MASK(_n) (0x04 + ((_n) << 3)) > > +#define PCIE_EN7581_PBUS_BASE_ADDR(_n) \ > > + ((_n) =3D=3D 2 ? 0x28000000 : \ > > + (_n) =3D=3D 1 ? 0x24000000 : 0x20000000) > > +#define PCIE_EN7581_PBUS_BASE_ADDR_MASK GENMASK(31, 26) > > + > > /* Time in ms needed to complete PCIe reset on EN7581 SoC */ > > #define PCIE_EN7581_RESET_TIME_MS 100 > > =20 > > @@ -931,7 +940,8 @@ static int mtk_pcie_parse_port(struct mtk_gen3_pcie= *pcie) > > static int mtk_pcie_en7581_power_up(struct mtk_gen3_pcie *pcie) > > { > > struct device *dev =3D pcie->dev; > > - int err; > > + struct regmap *map; > > + int err, slot; > > u32 val; > > =20 > > /* > > @@ -945,6 +955,24 @@ static int mtk_pcie_en7581_power_up(struct mtk_gen= 3_pcie *pcie) > > /* Wait for the time needed to complete the reset lines assert. */ > > msleep(PCIE_EN7581_RESET_TIME_MS); > > =20 > > + map =3D syscon_regmap_lookup_by_phandle(dev->of_node, > > + "mediatek,pbus-csr"); > > + if (IS_ERR(map)) > > + return PTR_ERR(map); >=20 > So this is going to regress the devicetree's that do not define this sysc= on > region? But I do not see any devicetree using this 'airoha,en7581-pcie' > compatible, so not sure if this is going to be an issue. Are the downstre= am > devicetrees used? AFAIK there is no upstream or downstream (e.g. OpenWrt) en7581 dts with PCIe support yet so I do not know if this is an issue or not. If so, I guess we need to add the proper Fixes tag: Fixes: f6ab898356dd ("PCI: mediatek-gen3: Add Airoha EN7581 support") Regards, Lorenzo >=20 > - Mani >=20 > --=20 > =E0=AE=AE=E0=AE=A3=E0=AE=BF=E0=AE=B5=E0=AE=A3=E0=AF=8D=E0=AE=A3=E0=AE=A9= =E0=AF=8D =E0=AE=9A=E0=AE=A4=E0=AE=BE=E0=AE=9A=E0=AE=BF=E0=AE=B5=E0=AE=AE= =E0=AF=8D --2DDNq2ksAqtJIqnN Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iHUEABYKAB0WIQTquNwa3Txd3rGGn7Y6cBh0uS2trAUCZ7MpNAAKCRA6cBh0uS2t rIuEAP9rnTTRV1mWaP3Z7uCsLUu0NlHr8BpEtVsjDGVDIPv7+wEA9eryLOzy0dp5 zACOFi5/qvhsY75r70+bG8mpUeyRYg8= =IvLf -----END PGP SIGNATURE----- --2DDNq2ksAqtJIqnN--