[PATCH 0/2] Add support for PCIe RP PERST#

[PATCH 0/2] Add support for PCIe RP PERST#

[Sai Krishna Musham]

Add support for PCIe Root Port PERST# signal.

Add `reset-gpios` property to the Versal CPM PCIe controller binding.

Sai Krishna Musham (2):
  dt-bindings: PCI: xilinx-cpm: Add reset-gpios for PCIe RP PERST#
  PCI: xilinx-cpm: Add support for PCIe RP PERST# signal

 .../bindings/pci/xilinx-versal-cpm.yaml       |  6 +++++
 drivers/pci/controller/pcie-xilinx-cpm.c      | 23 +++++++++++++++++++
 2 files changed, 29 insertions(+)

-- 
2.44.1

[PATCH 1/2] dt-bindings: PCI: xilinx-cpm: Add reset-gpios for PCIe RP PERST#

[Sai Krishna Musham]

Introduce `reset-gpios` property to enable GPIO-based control of
the PCIe RP PERST# signal, generating assert and deassert signals.

Signed-off-by: Sai Krishna Musham <sai.krishna.musham@amd.com>
---
This patch depends on the following patch series.
https://lore.kernel.org/all/20250217072713.635643-2-thippeswamy.havalige@amd.com/
---
 .../devicetree/bindings/pci/xilinx-versal-cpm.yaml          | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/Documentation/devicetree/bindings/pci/xilinx-versal-cpm.yaml b/Documentation/devicetree/bindings/pci/xilinx-versal-cpm.yaml
index b63a759ec2d7..293ed36d0cea 100644
--- a/Documentation/devicetree/bindings/pci/xilinx-versal-cpm.yaml
+++ b/Documentation/devicetree/bindings/pci/xilinx-versal-cpm.yaml
@@ -33,6 +33,9 @@ properties:
       - const: cpm_csr
     minItems: 2
 
+  reset-gpios:
+    description: GPIO used as PERST# signal. Please refer to pci.txt.
+
   interrupts:
     maxItems: 1
 
@@ -63,6 +66,7 @@ properties:
 required:
   - reg
   - reg-names
+  - reset-gpios
   - "#interrupt-cells"
   - interrupts
   - interrupt-map
@@ -99,6 +103,7 @@ examples:
                        reg = <0x0 0xfca10000 0x0 0x1000>,
                              <0x6 0x00000000 0x0 0x10000000>;
                        reg-names = "cpm_slcr", "cfg";
+                       reset-gpios = <&gpio1 38 0x01>;
                        pcie_intc_0: interrupt-controller {
                                #address-cells = <0>;
                                #interrupt-cells = <1>;
@@ -127,6 +132,7 @@ examples:
                              <0x06 0x00000000 0x00 0x1000000>,
                              <0x00 0xfce20000 0x00 0x1000000>;
                        reg-names = "cpm_slcr", "cfg", "cpm_csr";
+                       reset-gpios = <&gpio1 38 0x01>;
 
                        pcie_intc_1: interrupt-controller {
                                #address-cells = <0>;
-- 
2.44.1

[PATCH 2/2] PCI: xilinx-cpm: Add support for PCIe RP PERST# signal

[Sai Krishna Musham]

Add GPIO-based control for the PCIe Root Port PERST# signal.

According to section 2.2 of the PCIe Electromechanical Specification
(Revision 6.0), PERST# signal has to be deasserted after a delay of
100 ms (TPVPERL) to ensure proper reset sequencing during PCIe
initialization.

Signed-off-by: Sai Krishna Musham <sai.krishna.musham@amd.com>
---
This patch depends on the following patch series.
https://lore.kernel.org/all/20250217072713.635643-3-thippeswamy.havalige@amd.com/
---
 drivers/pci/controller/pcie-xilinx-cpm.c | 23 +++++++++++++++++++++++
 1 file changed, 23 insertions(+)

diff --git a/drivers/pci/controller/pcie-xilinx-cpm.c b/drivers/pci/controller/pcie-xilinx-cpm.c
index 81e8bfae53d0..0e31b85658e6 100644
--- a/drivers/pci/controller/pcie-xilinx-cpm.c
+++ b/drivers/pci/controller/pcie-xilinx-cpm.c
@@ -6,6 +6,8 @@
  */
 
 #include <linux/bitfield.h>
+#include <linux/delay.h>
+#include <linux/gpio/consumer.h>
 #include <linux/interrupt.h>
 #include <linux/irq.h>
 #include <linux/irqchip.h>
@@ -568,8 +570,29 @@ static int xilinx_cpm_pcie_probe(struct platform_device *pdev)
 	struct device *dev = &pdev->dev;
 	struct pci_host_bridge *bridge;
 	struct resource_entry *bus;
+	struct gpio_desc *reset_gpio;
 	int err;
 
+	/* Request the GPIO for PCIe reset signal */
+	reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_LOW);
+	if (IS_ERR(reset_gpio)) {
+		dev_err(dev, "Failed to request reset GPIO\n");
+		return PTR_ERR(reset_gpio);
+	}
+
+	/* Assert the reset signal */
+	gpiod_set_value(reset_gpio, 0);
+
+	/*
+	 * As per section 2.2 of the PCI Express Card Electromechanical
+	 * Specification (Revision 6.0), the deassertion of the PERST# signal
+	 * should be delayed by 100 ms (TPVPERL).
+	 */
+	msleep(100);
+
+	/* Deassert the reset signal */
+	gpiod_set_value(reset_gpio, 1);
+
 	bridge = devm_pci_alloc_host_bridge(dev, sizeof(*port));
 	if (!bridge)
 		return -ENODEV;
-- 
2.44.1

Re: [PATCH 1/2] dt-bindings: PCI: xilinx-cpm: Add reset-gpios for PCIe RP PERST#

[Manivannan Sadhasivam]

On Mon, Feb 24, 2025 at 12:00:45PM +0530, Sai Krishna Musham wrote:
> Introduce `reset-gpios` property to enable GPIO-based control of
> the PCIe RP PERST# signal, generating assert and deassert signals.
> 
> Signed-off-by: Sai Krishna Musham <sai.krishna.musham@amd.com>
> ---
> This patch depends on the following patch series.
> https://lore.kernel.org/all/20250217072713.635643-2-thippeswamy.havalige@amd.com/
> ---
>  .../devicetree/bindings/pci/xilinx-versal-cpm.yaml          | 6 ++++++
>  1 file changed, 6 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/pci/xilinx-versal-cpm.yaml b/Documentation/devicetree/bindings/pci/xilinx-versal-cpm.yaml
> index b63a759ec2d7..293ed36d0cea 100644
> --- a/Documentation/devicetree/bindings/pci/xilinx-versal-cpm.yaml
> +++ b/Documentation/devicetree/bindings/pci/xilinx-versal-cpm.yaml
> @@ -33,6 +33,9 @@ properties:
>        - const: cpm_csr
>      minItems: 2
>  
> +  reset-gpios:
> +    description: GPIO used as PERST# signal. Please refer to pci.txt.
> +
>    interrupts:
>      maxItems: 1
>  
> @@ -63,6 +66,7 @@ properties:
>  required:
>    - reg
>    - reg-names
> +  - reset-gpios

This is an ABI break. If you make it required now, old DTS will be broken.

>    - "#interrupt-cells"
>    - interrupts
>    - interrupt-map
> @@ -99,6 +103,7 @@ examples:
>                         reg = <0x0 0xfca10000 0x0 0x1000>,
>                               <0x6 0x00000000 0x0 0x10000000>;
>                         reg-names = "cpm_slcr", "cfg";
> +                       reset-gpios = <&gpio1 38 0x01>;

Please use proper defines in include/dt-bindings/gpio/gpio.h for the GPIO
polarity.

>                         pcie_intc_0: interrupt-controller {
>                                 #address-cells = <0>;
>                                 #interrupt-cells = <1>;
> @@ -127,6 +132,7 @@ examples:
>                               <0x06 0x00000000 0x00 0x1000000>,
>                               <0x00 0xfce20000 0x00 0x1000000>;
>                         reg-names = "cpm_slcr", "cfg", "cpm_csr";
> +                       reset-gpios = <&gpio1 38 0x01>;

Same here.

- Mani

-- 
மணிவண்ணன் சதாசிவம்

Re: [PATCH 2/2] PCI: xilinx-cpm: Add support for PCIe RP PERST# signal

[Manivannan Sadhasivam]

On Mon, Feb 24, 2025 at 12:00:46PM +0530, Sai Krishna Musham wrote:
> Add GPIO-based control for the PCIe Root Port PERST# signal.
> 
> According to section 2.2 of the PCIe Electromechanical Specification
> (Revision 6.0), PERST# signal has to be deasserted after a delay of
> 100 ms (TPVPERL) to ensure proper reset sequencing during PCIe
> initialization.
> 
> Signed-off-by: Sai Krishna Musham <sai.krishna.musham@amd.com>
> ---
> This patch depends on the following patch series.
> https://lore.kernel.org/all/20250217072713.635643-3-thippeswamy.havalige@amd.com/
> ---
>  drivers/pci/controller/pcie-xilinx-cpm.c | 23 +++++++++++++++++++++++
>  1 file changed, 23 insertions(+)
> 
> diff --git a/drivers/pci/controller/pcie-xilinx-cpm.c b/drivers/pci/controller/pcie-xilinx-cpm.c
> index 81e8bfae53d0..0e31b85658e6 100644
> --- a/drivers/pci/controller/pcie-xilinx-cpm.c
> +++ b/drivers/pci/controller/pcie-xilinx-cpm.c
> @@ -6,6 +6,8 @@
>   */
>  
>  #include <linux/bitfield.h>
> +#include <linux/delay.h>
> +#include <linux/gpio/consumer.h>
>  #include <linux/interrupt.h>
>  #include <linux/irq.h>
>  #include <linux/irqchip.h>
> @@ -568,8 +570,29 @@ static int xilinx_cpm_pcie_probe(struct platform_device *pdev)
>  	struct device *dev = &pdev->dev;
>  	struct pci_host_bridge *bridge;
>  	struct resource_entry *bus;
> +	struct gpio_desc *reset_gpio;
>  	int err;
>  
> +	/* Request the GPIO for PCIe reset signal */
> +	reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_LOW);

You've defined the polarity as 0x1 in the binding. Which corresponds to
GPIO_ACTIVE_LOW. So if you request the GPIO as GPIOD_OUT_LOW, it means the host
is going to drive the PERST# line as 'high', which corresponds to PERST#
deassert. I don't think you'd want that and if that is what is really happening,
the endpoint state machine would be broken. So I suspect that the polarity of
your PERST# line is wrong.

- Mani

> +	if (IS_ERR(reset_gpio)) {
> +		dev_err(dev, "Failed to request reset GPIO\n");
> +		return PTR_ERR(reset_gpio);
> +	}
> +
> +	/* Assert the reset signal */
> +	gpiod_set_value(reset_gpio, 0);
> +
> +	/*
> +	 * As per section 2.2 of the PCI Express Card Electromechanical
> +	 * Specification (Revision 6.0), the deassertion of the PERST# signal
> +	 * should be delayed by 100 ms (TPVPERL).
> +	 */
> +	msleep(100);
> +
> +	/* Deassert the reset signal */
> +	gpiod_set_value(reset_gpio, 1);
> +
>  	bridge = devm_pci_alloc_host_bridge(dev, sizeof(*port));
>  	if (!bridge)
>  		return -ENODEV;
> -- 
> 2.44.1
> 

-- 
மணிவண்ணன் சதாசிவம்

Re: [PATCH 2/2] PCI: xilinx-cpm: Add support for PCIe RP PERST# signal

[Niklas Cassel]

On Mon, Feb 24, 2025 at 12:32:36PM +0530, Manivannan Sadhasivam wrote:
> On Mon, Feb 24, 2025 at 12:00:46PM +0530, Sai Krishna Musham wrote:
> > Add GPIO-based control for the PCIe Root Port PERST# signal.
> > 
> > According to section 2.2 of the PCIe Electromechanical Specification
> > (Revision 6.0), PERST# signal has to be deasserted after a delay of
> > 100 ms (TPVPERL) to ensure proper reset sequencing during PCIe
> > initialization.
> > 
> > Signed-off-by: Sai Krishna Musham <sai.krishna.musham@amd.com>
> > ---
> > This patch depends on the following patch series.
> > https://lore.kernel.org/all/20250217072713.635643-3-thippeswamy.havalige@amd.com/
> > ---
> >  drivers/pci/controller/pcie-xilinx-cpm.c | 23 +++++++++++++++++++++++
> >  1 file changed, 23 insertions(+)
> > 
> > diff --git a/drivers/pci/controller/pcie-xilinx-cpm.c b/drivers/pci/controller/pcie-xilinx-cpm.c
> > index 81e8bfae53d0..0e31b85658e6 100644
> > --- a/drivers/pci/controller/pcie-xilinx-cpm.c
> > +++ b/drivers/pci/controller/pcie-xilinx-cpm.c
> > @@ -6,6 +6,8 @@
> >   */
> >  
> >  #include <linux/bitfield.h>
> > +#include <linux/delay.h>
> > +#include <linux/gpio/consumer.h>
> >  #include <linux/interrupt.h>
> >  #include <linux/irq.h>
> >  #include <linux/irqchip.h>
> > @@ -568,8 +570,29 @@ static int xilinx_cpm_pcie_probe(struct platform_device *pdev)
> >  	struct device *dev = &pdev->dev;
> >  	struct pci_host_bridge *bridge;
> >  	struct resource_entry *bus;
> > +	struct gpio_desc *reset_gpio;
> >  	int err;
> >  
> > +	/* Request the GPIO for PCIe reset signal */
> > +	reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_LOW);
> 
> You've defined the polarity as 0x1 in the binding. Which corresponds to
> GPIO_ACTIVE_LOW. So if you request the GPIO as GPIOD_OUT_LOW, it means the host
> is going to drive the PERST# line as 'high', which corresponds to PERST#
> deassert. I don't think you'd want that and if that is what is really happening,
> the endpoint state machine would be broken. So I suspect that the polarity of
> your PERST# line is wrong.
> 
> - Mani
> 
> > +	if (IS_ERR(reset_gpio)) {
> > +		dev_err(dev, "Failed to request reset GPIO\n");
> > +		return PTR_ERR(reset_gpio);
> > +	}
> > +
> > +	/* Assert the reset signal */
> > +	gpiod_set_value(reset_gpio, 0);
> > +
> > +	/*
> > +	 * As per section 2.2 of the PCI Express Card Electromechanical
> > +	 * Specification (Revision 6.0), the deassertion of the PERST# signal
> > +	 * should be delayed by 100 ms (TPVPERL).
> > +	 */
> > +	msleep(100);
> > +
> > +	/* Deassert the reset signal */
> > +	gpiod_set_value(reset_gpio, 1);
> > +

Since you are adding PERST# to your DT binding, please make sure that you
define it properly (as active low) in the DT binding.

Then in the driver things should look like this and nothing else:
devm_gpiod_get(..., GPIOD_OUT_HIGH); // will assert PERST#
gpiod_set_value(reset_gpio, 1); // assert PERST# (will be a no-op since PERST# is already asserted)
msleep(100);
gpiod_set_value(reset_gpio, 0); // deassert PERST#



Kind regards,
Niklas