* [PATCH] arm64: dts: s32g: add FlexCAN[0..3] support for s32g2 and s32g3
@ 2025-02-24 13:40 Ciprian Costea
2025-02-24 13:45 ` Marc Kleine-Budde
` (2 more replies)
0 siblings, 3 replies; 5+ messages in thread
From: Ciprian Costea @ 2025-02-24 13:40 UTC (permalink / raw)
To: Chester Lin, Matthias Brugger, Ghennadi Procopciuc, Shawn Guo,
Sascha Hauer, Fabio Estevam, Rob Herring, Krzysztof Kozlowski,
Conor Dooley
Cc: Pengutronix Kernel Team, linux-arm-kernel, devicetree,
linux-kernel, NXP S32 Linux, imx, Christophe Lizzi, Alberto Ruiz,
Enric Balletbo, Ciprian Marian Costea
From: Ciprian Marian Costea <ciprianmarian.costea@oss.nxp.com>
Add FlexCAN[0..3] for S32G2 and S32G3 SoCs.
Signed-off-by: Ciprian Marian Costea <ciprianmarian.costea@oss.nxp.com>
---
arch/arm64/boot/dts/freescale/s32g2.dtsi | 52 ++++++++++++++
arch/arm64/boot/dts/freescale/s32g3.dtsi | 56 +++++++++++++++
.../boot/dts/freescale/s32gxxxa-evb.dtsi | 72 +++++++++++++++++++
.../boot/dts/freescale/s32gxxxa-rdb.dtsi | 48 +++++++++++++
4 files changed, 228 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/s32g2.dtsi b/arch/arm64/boot/dts/freescale/s32g2.dtsi
index e38f1f878790..ea1456d361a3 100644
--- a/arch/arm64/boot/dts/freescale/s32g2.dtsi
+++ b/arch/arm64/boot/dts/freescale/s32g2.dtsi
@@ -334,6 +334,32 @@ edma0: dma-controller@40144000 {
clock-names = "dmamux0", "dmamux1";
};
+ can0: can@401b4000 {
+ compatible = "nxp,s32g2-flexcan";
+ reg = <0x401b4000 0xa000>;
+ interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "mb-0", "state", "berr", "mb-1";
+ clocks = <&clks 9>, <&clks 11>;
+ clock-names = "ipg", "per";
+ status = "disabled";
+ };
+
+ can1: can@401be000 {
+ compatible = "nxp,s32g2-flexcan";
+ reg = <0x401be000 0xa000>;
+ interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "mb-0", "state", "berr", "mb-1";
+ clocks = <&clks 9>, <&clks 11>;
+ clock-names = "ipg", "per";
+ status = "disabled";
+ };
+
uart0: serial@401c8000 {
compatible = "nxp,s32g2-linflexuart",
"fsl,s32v234-linflexuart";
@@ -400,6 +426,32 @@ edma1: dma-controller@40244000 {
clock-names = "dmamux0", "dmamux1";
};
+ can2: can@402a8000 {
+ compatible = "nxp,s32g2-flexcan";
+ reg = <0x402a8000 0xa000>;
+ interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "mb-0", "state", "berr", "mb-1";
+ clocks = <&clks 9>, <&clks 11>;
+ clock-names = "ipg", "per";
+ status = "disabled";
+ };
+
+ can3: can@402b2000 {
+ compatible = "nxp,s32g2-flexcan";
+ reg = <0x402b2000 0xa000>;
+ interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "mb-0", "state", "berr", "mb-1";
+ clocks = <&clks 9>, <&clks 11>;
+ clock-names = "ipg", "per";
+ status = "disabled";
+ };
+
uart2: serial@402bc000 {
compatible = "nxp,s32g2-linflexuart",
"fsl,s32v234-linflexuart";
diff --git a/arch/arm64/boot/dts/freescale/s32g3.dtsi b/arch/arm64/boot/dts/freescale/s32g3.dtsi
index d849edfd26f5..991dbfbfa203 100644
--- a/arch/arm64/boot/dts/freescale/s32g3.dtsi
+++ b/arch/arm64/boot/dts/freescale/s32g3.dtsi
@@ -391,6 +391,34 @@ edma0: dma-controller@40144000 {
clock-names = "dmamux0", "dmamux1";
};
+ can0: can@401b4000 {
+ compatible = "nxp,s32g3-flexcan",
+ "nxp,s32g2-flexcan";
+ reg = <0x401b4000 0xa000>;
+ interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "mb-0", "state", "berr", "mb-1";
+ clocks = <&clks 9>, <&clks 11>;
+ clock-names = "ipg", "per";
+ status = "disabled";
+ };
+
+ can1: can@401be000 {
+ compatible = "nxp,s32g3-flexcan",
+ "nxp,s32g2-flexcan";
+ reg = <0x401be000 0xa000>;
+ interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "mb-0", "state", "berr", "mb-1";
+ clocks = <&clks 9>, <&clks 11>;
+ clock-names = "ipg", "per";
+ status = "disabled";
+ };
+
uart0: serial@401c8000 {
compatible = "nxp,s32g3-linflexuart",
"fsl,s32v234-linflexuart";
@@ -460,6 +488,34 @@ edma1: dma-controller@40244000 {
clock-names = "dmamux0", "dmamux1";
};
+ can2: can@402a8000 {
+ compatible = "nxp,s32g3-flexcan",
+ "nxp,s32g2-flexcan";
+ reg = <0x402a8000 0xa000>;
+ interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "mb-0", "state", "berr", "mb-1";
+ clocks = <&clks 9>, <&clks 11>;
+ clock-names = "ipg", "per";
+ status = "disabled";
+ };
+
+ can3: can@402b2000 {
+ compatible = "nxp,s32g3-flexcan",
+ "nxp,s32g2-flexcan";
+ reg = <0x402b2000 0xa000>;
+ interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "mb-0", "state", "berr", "mb-1";
+ clocks = <&clks 9>, <&clks 11>;
+ clock-names = "ipg", "per";
+ status = "disabled";
+ };
+
uart2: serial@402bc000 {
compatible = "nxp,s32g3-linflexuart",
"fsl,s32v234-linflexuart";
diff --git a/arch/arm64/boot/dts/freescale/s32gxxxa-evb.dtsi b/arch/arm64/boot/dts/freescale/s32gxxxa-evb.dtsi
index a44eff28073a..d26af0fb8be7 100644
--- a/arch/arm64/boot/dts/freescale/s32gxxxa-evb.dtsi
+++ b/arch/arm64/boot/dts/freescale/s32gxxxa-evb.dtsi
@@ -8,6 +8,60 @@
*/
&pinctrl {
+ can0_pins: can0-pins {
+ can0-grp0 {
+ pinmux = <0x2c1>;
+ output-enable;
+ slew-rate = <133>;
+ };
+
+ can0-grp1 {
+ pinmux = <0x2b0>;
+ input-enable;
+ slew-rate = <133>;
+ };
+
+ can0-grp2 {
+ pinmux = <0x2012>;
+ };
+ };
+
+ can2_pins: can2-pins {
+ can2-grp0 {
+ pinmux = <0x1b2>;
+ output-enable;
+ slew-rate = <133>;
+ };
+
+ can2-grp1 {
+ pinmux = <0x1c0>;
+ input-enable;
+ slew-rate = <133>;
+ };
+
+ can2-grp2 {
+ pinmux = <0x2782>;
+ };
+ };
+
+ can3_pins: can3-pins {
+ can3-grp0 {
+ pinmux = <0x192>;
+ output-enable;
+ slew-rate = <133>;
+ };
+
+ can3-grp1 {
+ pinmux = <0x1a0>;
+ input-enable;
+ slew-rate = <133>;
+ };
+
+ can3-grp2 {
+ pinmux = <0x2792>;
+ };
+ };
+
i2c0_pins: i2c0-pins {
i2c0-grp0 {
pinmux = <0x101>, <0x111>;
@@ -121,6 +175,24 @@ i2c4-gpio-grp1 {
};
};
+&can0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&can0_pins>;
+ status = "okay";
+};
+
+&can2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&can2_pins>;
+ status = "okay";
+};
+
+&can3 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&can3_pins>;
+ status = "okay";
+};
+
&i2c0 {
pinctrl-names = "default", "gpio";
pinctrl-0 = <&i2c0_pins>;
diff --git a/arch/arm64/boot/dts/freescale/s32gxxxa-rdb.dtsi b/arch/arm64/boot/dts/freescale/s32gxxxa-rdb.dtsi
index 91fd8dbf2224..ba53ec622f0b 100644
--- a/arch/arm64/boot/dts/freescale/s32gxxxa-rdb.dtsi
+++ b/arch/arm64/boot/dts/freescale/s32gxxxa-rdb.dtsi
@@ -8,6 +8,42 @@
*/
&pinctrl {
+ can0_pins: can0-pins {
+ can0-grp0 {
+ pinmux = <0x112>;
+ output-enable;
+ slew-rate = <133>;
+ };
+
+ can0-grp1 {
+ pinmux = <0x120>;
+ input-enable;
+ slew-rate = <133>;
+ };
+
+ can0-grp2 {
+ pinmux = <0x2013>;
+ };
+ };
+
+ can1_pins: can1-pins {
+ can1-grp0 {
+ pinmux = <0x132>;
+ output-enable;
+ slew-rate = <133>;
+ };
+
+ can1-grp1 {
+ pinmux = <0x140>;
+ input-enable;
+ slew-rate = <133>;
+ };
+
+ can1-grp2 {
+ pinmux = <0x2772>;
+ };
+ };
+
i2c0_pins: i2c0-pins {
i2c0-grp0 {
pinmux = <0x1f2>, <0x201>;
@@ -93,6 +129,18 @@ i2c4-gpio-grp1 {
};
};
+&can0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&can0_pins>;
+ status = "okay";
+};
+
+&can1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&can1_pins>;
+ status = "okay";
+};
+
&i2c0 {
pinctrl-names = "default", "gpio";
pinctrl-0 = <&i2c0_pins>;
--
2.45.2
^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [PATCH] arm64: dts: s32g: add FlexCAN[0..3] support for s32g2 and s32g3
2025-02-24 13:40 [PATCH] arm64: dts: s32g: add FlexCAN[0..3] support for s32g2 and s32g3 Ciprian Costea
@ 2025-02-24 13:45 ` Marc Kleine-Budde
2025-02-25 20:12 ` Rob Herring (Arm)
2025-03-11 2:27 ` Shawn Guo
2 siblings, 0 replies; 5+ messages in thread
From: Marc Kleine-Budde @ 2025-02-24 13:45 UTC (permalink / raw)
To: Ciprian Costea
Cc: Chester Lin, Matthias Brugger, Ghennadi Procopciuc, Shawn Guo,
Sascha Hauer, Fabio Estevam, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, devicetree, NXP S32 Linux, Enric Balletbo, imx,
linux-kernel, Pengutronix Kernel Team, Alberto Ruiz,
Christophe Lizzi, linux-arm-kernel
[-- Attachment #1: Type: text/plain, Size: 617 bytes --]
On 24.02.2025 15:40:16, Ciprian Costea wrote:
> From: Ciprian Marian Costea <ciprianmarian.costea@oss.nxp.com>
>
> Add FlexCAN[0..3] for S32G2 and S32G3 SoCs.
The dt-bindings patch that documents support for the S32G2/S32G3 is in
net-next/main: 51723790b718 ("dt-bindings: can: fsl,flexcan: add
S32G2/S32G3 SoC support")
regards,
Marc
--
Pengutronix e.K. | Marc Kleine-Budde |
Embedded Linux | https://www.pengutronix.de |
Vertretung Nürnberg | Phone: +49-5121-206917-129 |
Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-9 |
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 488 bytes --]
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH] arm64: dts: s32g: add FlexCAN[0..3] support for s32g2 and s32g3
2025-02-24 13:40 [PATCH] arm64: dts: s32g: add FlexCAN[0..3] support for s32g2 and s32g3 Ciprian Costea
2025-02-24 13:45 ` Marc Kleine-Budde
@ 2025-02-25 20:12 ` Rob Herring (Arm)
2025-02-25 20:29 ` Marc Kleine-Budde
2025-03-11 2:27 ` Shawn Guo
2 siblings, 1 reply; 5+ messages in thread
From: Rob Herring (Arm) @ 2025-02-25 20:12 UTC (permalink / raw)
To: Ciprian Costea
Cc: Shawn Guo, Sascha Hauer, Ghennadi Procopciuc,
Pengutronix Kernel Team, Fabio Estevam, Chester Lin,
Matthias Brugger, Conor Dooley, imx, Enric Balletbo,
linux-arm-kernel, Christophe Lizzi, Krzysztof Kozlowski,
linux-kernel, Alberto Ruiz, NXP S32 Linux, devicetree
On Mon, 24 Feb 2025 15:40:16 +0200, Ciprian Costea wrote:
> From: Ciprian Marian Costea <ciprianmarian.costea@oss.nxp.com>
>
> Add FlexCAN[0..3] for S32G2 and S32G3 SoCs.
>
> Signed-off-by: Ciprian Marian Costea <ciprianmarian.costea@oss.nxp.com>
> ---
> arch/arm64/boot/dts/freescale/s32g2.dtsi | 52 ++++++++++++++
> arch/arm64/boot/dts/freescale/s32g3.dtsi | 56 +++++++++++++++
> .../boot/dts/freescale/s32gxxxa-evb.dtsi | 72 +++++++++++++++++++
> .../boot/dts/freescale/s32gxxxa-rdb.dtsi | 48 +++++++++++++
> 4 files changed, 228 insertions(+)
>
My bot found new DTB warnings on the .dts files added or changed in this
series.
Some warnings may be from an existing SoC .dtsi. Or perhaps the warnings
are fixed by another series. Ultimately, it is up to the platform
maintainer whether these warnings are acceptable or not. No need to reply
unless the platform maintainer has comments.
If you already ran DT checks and didn't see these error(s), then
make sure dt-schema is up to date:
pip3 install dtschema --upgrade
New warnings running 'make CHECK_DTBS=y for arch/arm64/boot/dts/freescale/' for 20250224134016.3921196-1-ciprianmarian.costea@oss.nxp.com:
arch/arm64/boot/dts/freescale/s32g399a-rdb3.dtb: /soc@0/can@401b4000: failed to match any schema with compatible: ['nxp,s32g3-flexcan', 'nxp,s32g2-flexcan']
arch/arm64/boot/dts/freescale/s32g399a-rdb3.dtb: /soc@0/can@401b4000: failed to match any schema with compatible: ['nxp,s32g3-flexcan', 'nxp,s32g2-flexcan']
arch/arm64/boot/dts/freescale/s32g399a-rdb3.dtb: /soc@0/can@401be000: failed to match any schema with compatible: ['nxp,s32g3-flexcan', 'nxp,s32g2-flexcan']
arch/arm64/boot/dts/freescale/s32g399a-rdb3.dtb: /soc@0/can@401be000: failed to match any schema with compatible: ['nxp,s32g3-flexcan', 'nxp,s32g2-flexcan']
arch/arm64/boot/dts/freescale/s32g399a-rdb3.dtb: /soc@0/can@402a8000: failed to match any schema with compatible: ['nxp,s32g3-flexcan', 'nxp,s32g2-flexcan']
arch/arm64/boot/dts/freescale/s32g399a-rdb3.dtb: /soc@0/can@402a8000: failed to match any schema with compatible: ['nxp,s32g3-flexcan', 'nxp,s32g2-flexcan']
arch/arm64/boot/dts/freescale/s32g399a-rdb3.dtb: /soc@0/can@402b2000: failed to match any schema with compatible: ['nxp,s32g3-flexcan', 'nxp,s32g2-flexcan']
arch/arm64/boot/dts/freescale/s32g399a-rdb3.dtb: /soc@0/can@402b2000: failed to match any schema with compatible: ['nxp,s32g3-flexcan', 'nxp,s32g2-flexcan']
arch/arm64/boot/dts/freescale/s32g274a-evb.dtb: /soc@0/can@401b4000: failed to match any schema with compatible: ['nxp,s32g2-flexcan']
arch/arm64/boot/dts/freescale/s32g274a-evb.dtb: /soc@0/can@401be000: failed to match any schema with compatible: ['nxp,s32g2-flexcan']
arch/arm64/boot/dts/freescale/s32g274a-evb.dtb: /soc@0/can@402a8000: failed to match any schema with compatible: ['nxp,s32g2-flexcan']
arch/arm64/boot/dts/freescale/s32g274a-evb.dtb: /soc@0/can@402b2000: failed to match any schema with compatible: ['nxp,s32g2-flexcan']
arch/arm64/boot/dts/freescale/s32g274a-rdb2.dtb: /soc@0/can@401b4000: failed to match any schema with compatible: ['nxp,s32g2-flexcan']
arch/arm64/boot/dts/freescale/s32g274a-rdb2.dtb: /soc@0/can@401be000: failed to match any schema with compatible: ['nxp,s32g2-flexcan']
arch/arm64/boot/dts/freescale/s32g274a-rdb2.dtb: /soc@0/can@402a8000: failed to match any schema with compatible: ['nxp,s32g2-flexcan']
arch/arm64/boot/dts/freescale/s32g274a-rdb2.dtb: /soc@0/can@402b2000: failed to match any schema with compatible: ['nxp,s32g2-flexcan']
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH] arm64: dts: s32g: add FlexCAN[0..3] support for s32g2 and s32g3
2025-02-25 20:12 ` Rob Herring (Arm)
@ 2025-02-25 20:29 ` Marc Kleine-Budde
0 siblings, 0 replies; 5+ messages in thread
From: Marc Kleine-Budde @ 2025-02-25 20:29 UTC (permalink / raw)
To: Rob Herring (Arm)
Cc: Ciprian Costea, Shawn Guo, Sascha Hauer, Ghennadi Procopciuc,
Pengutronix Kernel Team, Fabio Estevam, Chester Lin,
Matthias Brugger, Conor Dooley, imx, Enric Balletbo,
linux-arm-kernel, Christophe Lizzi, Krzysztof Kozlowski,
linux-kernel, Alberto Ruiz, NXP S32 Linux, devicetree
[-- Attachment #1: Type: text/plain, Size: 3744 bytes --]
On 25.02.2025 14:12:30, Rob Herring (Arm) wrote:
>
> On Mon, 24 Feb 2025 15:40:16 +0200, Ciprian Costea wrote:
> > From: Ciprian Marian Costea <ciprianmarian.costea@oss.nxp.com>
> >
> > Add FlexCAN[0..3] for S32G2 and S32G3 SoCs.
> >
> > Signed-off-by: Ciprian Marian Costea <ciprianmarian.costea@oss.nxp.com>
> > ---
> > arch/arm64/boot/dts/freescale/s32g2.dtsi | 52 ++++++++++++++
> > arch/arm64/boot/dts/freescale/s32g3.dtsi | 56 +++++++++++++++
> > .../boot/dts/freescale/s32gxxxa-evb.dtsi | 72 +++++++++++++++++++
> > .../boot/dts/freescale/s32gxxxa-rdb.dtsi | 48 +++++++++++++
> > 4 files changed, 228 insertions(+)
> >
>
>
> My bot found new DTB warnings on the .dts files added or changed in this
> series.
The dt-bindings patch that documents support for the S32G2/S32G3 is in
net-next/main: 51723790b718 ("dt-bindings: can: fsl,flexcan: add
S32G2/S32G3 SoC support")
> New warnings running 'make CHECK_DTBS=y for arch/arm64/boot/dts/freescale/' for 20250224134016.3921196-1-ciprianmarian.costea@oss.nxp.com:
>
> arch/arm64/boot/dts/freescale/s32g399a-rdb3.dtb: /soc@0/can@401b4000: failed to match any schema with compatible: ['nxp,s32g3-flexcan', 'nxp,s32g2-flexcan']
> arch/arm64/boot/dts/freescale/s32g399a-rdb3.dtb: /soc@0/can@401b4000: failed to match any schema with compatible: ['nxp,s32g3-flexcan', 'nxp,s32g2-flexcan']
> arch/arm64/boot/dts/freescale/s32g399a-rdb3.dtb: /soc@0/can@401be000: failed to match any schema with compatible: ['nxp,s32g3-flexcan', 'nxp,s32g2-flexcan']
> arch/arm64/boot/dts/freescale/s32g399a-rdb3.dtb: /soc@0/can@401be000: failed to match any schema with compatible: ['nxp,s32g3-flexcan', 'nxp,s32g2-flexcan']
> arch/arm64/boot/dts/freescale/s32g399a-rdb3.dtb: /soc@0/can@402a8000: failed to match any schema with compatible: ['nxp,s32g3-flexcan', 'nxp,s32g2-flexcan']
> arch/arm64/boot/dts/freescale/s32g399a-rdb3.dtb: /soc@0/can@402a8000: failed to match any schema with compatible: ['nxp,s32g3-flexcan', 'nxp,s32g2-flexcan']
> arch/arm64/boot/dts/freescale/s32g399a-rdb3.dtb: /soc@0/can@402b2000: failed to match any schema with compatible: ['nxp,s32g3-flexcan', 'nxp,s32g2-flexcan']
> arch/arm64/boot/dts/freescale/s32g399a-rdb3.dtb: /soc@0/can@402b2000: failed to match any schema with compatible: ['nxp,s32g3-flexcan', 'nxp,s32g2-flexcan']
> arch/arm64/boot/dts/freescale/s32g274a-evb.dtb: /soc@0/can@401b4000: failed to match any schema with compatible: ['nxp,s32g2-flexcan']
> arch/arm64/boot/dts/freescale/s32g274a-evb.dtb: /soc@0/can@401be000: failed to match any schema with compatible: ['nxp,s32g2-flexcan']
> arch/arm64/boot/dts/freescale/s32g274a-evb.dtb: /soc@0/can@402a8000: failed to match any schema with compatible: ['nxp,s32g2-flexcan']
> arch/arm64/boot/dts/freescale/s32g274a-evb.dtb: /soc@0/can@402b2000: failed to match any schema with compatible: ['nxp,s32g2-flexcan']
> arch/arm64/boot/dts/freescale/s32g274a-rdb2.dtb: /soc@0/can@401b4000: failed to match any schema with compatible: ['nxp,s32g2-flexcan']
> arch/arm64/boot/dts/freescale/s32g274a-rdb2.dtb: /soc@0/can@401be000: failed to match any schema with compatible: ['nxp,s32g2-flexcan']
> arch/arm64/boot/dts/freescale/s32g274a-rdb2.dtb: /soc@0/can@402a8000: failed to match any schema with compatible: ['nxp,s32g2-flexcan']
> arch/arm64/boot/dts/freescale/s32g274a-rdb2.dtb: /soc@0/can@402b2000: failed to match any schema with compatible: ['nxp,s32g2-flexcan']
Marc
--
Pengutronix e.K. | Marc Kleine-Budde |
Embedded Linux | https://www.pengutronix.de |
Vertretung Nürnberg | Phone: +49-5121-206917-129 |
Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-9 |
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^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH] arm64: dts: s32g: add FlexCAN[0..3] support for s32g2 and s32g3
2025-02-24 13:40 [PATCH] arm64: dts: s32g: add FlexCAN[0..3] support for s32g2 and s32g3 Ciprian Costea
2025-02-24 13:45 ` Marc Kleine-Budde
2025-02-25 20:12 ` Rob Herring (Arm)
@ 2025-03-11 2:27 ` Shawn Guo
2 siblings, 0 replies; 5+ messages in thread
From: Shawn Guo @ 2025-03-11 2:27 UTC (permalink / raw)
To: Ciprian Costea
Cc: Chester Lin, Matthias Brugger, Ghennadi Procopciuc, Shawn Guo,
Sascha Hauer, Fabio Estevam, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Pengutronix Kernel Team, linux-arm-kernel,
devicetree, linux-kernel, NXP S32 Linux, imx, Christophe Lizzi,
Alberto Ruiz, Enric Balletbo
On Mon, Feb 24, 2025 at 03:40:16PM +0200, Ciprian Costea wrote:
> From: Ciprian Marian Costea <ciprianmarian.costea@oss.nxp.com>
>
> Add FlexCAN[0..3] for S32G2 and S32G3 SoCs.
>
> Signed-off-by: Ciprian Marian Costea <ciprianmarian.costea@oss.nxp.com>
Applied, thanks!
^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2025-03-11 2:27 UTC | newest]
Thread overview: 5+ messages (download: mbox.gz follow: Atom feed
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2025-02-24 13:40 [PATCH] arm64: dts: s32g: add FlexCAN[0..3] support for s32g2 and s32g3 Ciprian Costea
2025-02-24 13:45 ` Marc Kleine-Budde
2025-02-25 20:12 ` Rob Herring (Arm)
2025-02-25 20:29 ` Marc Kleine-Budde
2025-03-11 2:27 ` Shawn Guo
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