From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id BADDD1D6DA8; Thu, 27 Feb 2025 17:19:16 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1740676758; cv=none; b=ismCJkVtu4JlOe3HmHR3Cew/wnpjQUaJqQFHWB6PzA3gih0E0uZvdnSBgAzSNb6hLgvvRdPWyHvEMvMsxAeMZSVQ9RkPmufAUoJ0ZhTfHdDrEvYKl5F5qy/tEwBfwuVr0KDdxtZ2QmwIVssEegxB/dq6HSRr/7eyx3QneuhY9YM= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1740676758; c=relaxed/simple; bh=GhKNCjpu8J5JxBDRjMz4sB0ZqqBj/+kIMtcCv7oYomU=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=d51BCJ9YnuHthcpywGdcP6oTlsO9drn/XJcGCSfdCQV/4yTh7hB6KRz/OKq99OQS7Vei/RUqeskSUV2v45MhsOfrQkJhFaRTvTYl3YYxSIXfnVbWN29slx9+uf3c93L7+Svb2zMHNY6zwWVDTm058nJ8nO5JTw8h69fiekSQ8xQ= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 821711477; Thu, 27 Feb 2025 09:19:31 -0800 (PST) Received: from bogus (e133711.arm.com [10.1.196.55]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 889613F5A1; Thu, 27 Feb 2025 09:19:13 -0800 (PST) Date: Thu, 27 Feb 2025 17:19:10 +0000 From: Sudeep Holla To: Will Deacon Cc: Vincenzo Frascino , Sudeep Holla , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Linus Walleij , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Liviu Dudau , Lorenzo Pieralisi , Russell King , Mark Rutland , Jessica Clarke Subject: Re: [PATCH v7 06/10] perf: arm_pmuv3: Add support for ARM Rainier PMU Message-ID: References: <20250221180349.1413089-1-vincenzo.frascino@arm.com> <20250221180349.1413089-7-vincenzo.frascino@arm.com> <20250227171456.GA25617@willie-the-truck> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20250227171456.GA25617@willie-the-truck> On Thu, Feb 27, 2025 at 05:14:57PM +0000, Will Deacon wrote: > On Thu, Feb 27, 2025 at 10:10:30AM +0000, Sudeep Holla wrote: > > > > On Fri, Feb 21, 2025 at 06:03:45PM +0000, Vincenzo Frascino wrote: > > > Add support for the ARM Rainier CPU core PMU. > > > > > > > I can't take this through Arm SoC as the DTS and dt-bindings changes > > are kept separate from the driver changes in their pull request to Linus. > > > > I need to keep the bindings(05/10) and the DTS(07/10) together to avoid > > DTC warnings. > > > > So the 2 options I see are: > > Defer this driver change until the bindings last upstream. > > OR > > Just take the perf driver change without the binding via perf tree > > > > For now, I will take all other patches except this. > > Works for me. I'll pick up the driver patch. > Thanks Will. -- Regards, Sudeep