From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 9FB6925BAA9 for ; Fri, 28 Feb 2025 11:07:20 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1740740842; cv=none; b=dVf8pIhA1PVmv27Mxb3sgluQWANvPVn4ev41lVA27IX6+tb9ittPj1Liqf1Bj9xVY3Y2hWs8AltIrAMO4HOFnzoeDwRpLZoaMFDKftYR0XhngyWn4Wm4abMf4/SkMc41FiLhD/wQP8rIJ16Xh2QaW7A7C8ZldW/sRrTJb6NatLI= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1740740842; c=relaxed/simple; bh=W5UaioCdnGF1rA6z3ia99nhjJBaJoLBcT4jWT6uYaoE=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=ATAqRYvLot6RxeGlb/kWVaL7T+cxP+JRGe5koeExyuV976VOTGK+eoRB1TbyZakzO7vt0xytuNhDi4NOGlXRiO7MGJGG7e49lQtxLzwMkeNH+egkkrBi491dqy+ZrDJloO8FF4Nq8lI/ciO+yUfPhq+9kzrMlnHtL4ZIo6NNR9M= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 3E6091692 for ; Fri, 28 Feb 2025 03:07:35 -0800 (PST) Received: from e110455-lin.cambridge.arm.com (usa-sjc-imap-foss1.foss.arm.com [10.121.207.14]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id BFE553F673 for ; Fri, 28 Feb 2025 03:07:19 -0800 (PST) Date: Fri, 28 Feb 2025 11:06:58 +0000 From: Liviu Dudau To: Marek Vasut Cc: linux-arm-kernel@lists.infradead.org, Boris Brezillon , Conor Dooley , David Airlie , Fabio Estevam , Krzysztof Kozlowski , Maarten Lankhorst , Maxime Ripard , Pengutronix Kernel Team , Philipp Zabel , Rob Herring , Sascha Hauer , Sebastian Reichel , Shawn Guo , Simona Vetter , Steven Price , Thomas Zimmermann , devicetree@vger.kernel.org, dri-devel@lists.freedesktop.org, imx@lists.linux.dev Subject: Re: [PATCH 6/9] drm/panthor: Reset GPU after L2 cache power off Message-ID: References: <20250227170012.124768-1-marex@denx.de> <20250227170012.124768-7-marex@denx.de> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20250227170012.124768-7-marex@denx.de> Hi Marek, On Thu, Feb 27, 2025 at 05:58:06PM +0100, Marek Vasut wrote: > This seems necessary on Freescale i.MX95 Mali G310 to reliably resume > from runtime PM suspend. Without this, if only the L2 is powered down > on RPM entry, the GPU gets stuck and does not indicate the firmware is > booted after RPM resume. That doesn't sound right. Can you tell me what GPU firmware are you running (we are now printing the git sha of the image at boot time). Best regards, Liviu > > Signed-off-by: Marek Vasut > --- > Cc: Boris Brezillon > Cc: Conor Dooley > Cc: David Airlie > Cc: Fabio Estevam > Cc: Krzysztof Kozlowski > Cc: Liviu Dudau > Cc: Maarten Lankhorst > Cc: Maxime Ripard > Cc: Pengutronix Kernel Team > Cc: Philipp Zabel > Cc: Rob Herring > Cc: Sascha Hauer > Cc: Sebastian Reichel > Cc: Shawn Guo > Cc: Simona Vetter > Cc: Steven Price > Cc: Thomas Zimmermann > Cc: devicetree@vger.kernel.org > Cc: dri-devel@lists.freedesktop.org > Cc: imx@lists.linux.dev > Cc: linux-arm-kernel@lists.infradead.org > --- > drivers/gpu/drm/panthor/panthor_gpu.c | 11 ++++++----- > 1 file changed, 6 insertions(+), 5 deletions(-) > > diff --git a/drivers/gpu/drm/panthor/panthor_gpu.c b/drivers/gpu/drm/panthor/panthor_gpu.c > index 671049020afaa..0f07ef7d9aea7 100644 > --- a/drivers/gpu/drm/panthor/panthor_gpu.c > +++ b/drivers/gpu/drm/panthor/panthor_gpu.c > @@ -470,11 +470,12 @@ int panthor_gpu_soft_reset(struct panthor_device *ptdev) > */ > void panthor_gpu_suspend(struct panthor_device *ptdev) > { > - /* On a fast reset, simply power down the L2. */ > - if (!ptdev->reset.fast) > - panthor_gpu_soft_reset(ptdev); > - else > - panthor_gpu_power_off(ptdev, L2, 1, 20000); > + /* > + * Power off the L2 and soft reset the GPU, that makes > + * iMX95 Mali G310 resume without firmware boot timeout. > + */ > + panthor_gpu_power_off(ptdev, L2, 1, 20000); > + panthor_gpu_soft_reset(ptdev); > > panthor_gpu_irq_suspend(&ptdev->gpu->irq); > } > -- > 2.47.2 > -- ==================== | I would like to | | fix the world, | | but they're not | | giving me the | \ source code! / --------------- ¯\_(ツ)_/¯