public inbox for devicetree@vger.kernel.org
 help / color / mirror / Atom feed
From: Jorge Ramirez <jorge.ramirez@oss.qualcomm.com>
To: Bjorn Andersson <andersson@kernel.org>
Cc: "Krzysztof Kozlowski" <krzk@kernel.org>,
	"Krishna Chaitanya Chundru" <krishna.chundru@oss.qualcomm.com>,
	"Bjorn Helgaas" <bhelgaas@google.com>,
	"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
	"Krzysztof Wilczyński" <kw@linux.com>,
	"Manivannan Sadhasivam" <manivannan.sadhasivam@linaro.org>,
	"Rob Herring" <robh@kernel.org>,
	"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
	"Conor Dooley" <conor+dt@kernel.org>,
	"chaitanya chundru" <quic_krichai@quicinc.com>,
	"Konrad Dybcio" <konradybcio@kernel.org>,
	cros-qcom-dts-watchers@chromium.org,
	"Jingoo Han" <jingoohan1@gmail.com>,
	"Bartosz Golaszewski" <brgl@bgdev.pl>,
	quic_vbadigan@quicnic.com, amitk@kernel.org,
	dmitry.baryshkov@linaro.org, linux-pci@vger.kernel.org,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-arm-msm@vger.kernel.org, jorge.ramirez@oss.qualcomm.com
Subject: Re: [PATCH v4 09/10] dt-bindings: PCI: qcom,pcie-sc7280: Add 'global' interrupt
Date: Wed, 5 Mar 2025 08:36:26 +0100	[thread overview]
Message-ID: <Z8f++i4MFku8ODKf@trex> (raw)
In-Reply-To: <t34rurxh5cb7hwzvt6ps3fgw4kh4ddwcieukskxxz5mo3pegst@jkapxm6izq7p>

On 26/02/25 10:29:43, Bjorn Andersson wrote:
> On Wed, Feb 26, 2025 at 08:32:42AM +0100, Krzysztof Kozlowski wrote:
> > On Tue, Feb 25, 2025 at 03:04:06PM +0530, Krishna Chaitanya Chundru wrote:
> > > Qcom PCIe RC controllers are capable of generating 'global' SPI interrupt
> > > to the host CPU. This interrupt can be used by the device driver to handle
> > > PCIe link specific events such as Link up and Link down, which give the
> > > driver a chance to start bus enumeration on its own when link is up and
> > > initiate link training if link goes to a bad state. The PCIe driver can
> > > still work without this interrupt but it will provide a nice user
> > > experience when device gets plugged and removed.
> > > 
> > > Hence, document it in the binding along with the existing MSI interrupts.
> > > Global interrupt is parsed as optional in driver, so adding it in bindings
> > > will not break the ABI.
> > > 
> > > Signed-off-by: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com>
> > > ---
> > >  Documentation/devicetree/bindings/pci/qcom,pcie-sc7280.yaml | 8 +++++---
> > >  1 file changed, 5 insertions(+), 3 deletions(-)
> > > 
> > > diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie-sc7280.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie-sc7280.yaml
> > > index 76cb9fbfd476..7ae09ba8da60 100644
> > > --- a/Documentation/devicetree/bindings/pci/qcom,pcie-sc7280.yaml
> > > +++ b/Documentation/devicetree/bindings/pci/qcom,pcie-sc7280.yaml
> > > @@ -54,7 +54,7 @@ properties:
> > >  
> > >    interrupts:
> > >      minItems: 8
> > > -    maxItems: 8
> > > +    maxItems: 9
> > >  
> > >    interrupt-names:
> > >      items:
> > > @@ -66,6 +66,7 @@ properties:
> > >        - const: msi5
> > >        - const: msi6
> > >        - const: msi7
> > > +      - const: global
> > 
> > Either context is missing or these are not synced with interrupts.
> > 
> 
> I think the patch context ("properties") is confusing here, but it looks
> to me that these are in sync: interrupts is defined to have 8 items, and
> interrupt-names is a list of msi0 through msi7.
> 
> @Krishna, these two last patches (adding the global interrupt) doesn't
> seem strongly connected to the switch patches. So, if Krzysztof agrees
> with above assessment, please submit them separately (i.e. a new series,
> 2 patches, v5).

um, but without these two patches, the functionality is broken requiring
users to manually rescan the pci bus (ie, via sysfs) to see what is
behind the bridge.

shouldnt the set include all the necessary patches? 


> 
> Regards,
> Bjorn
> 
> > Best regards,
> > Krzysztof
> > 

  parent reply	other threads:[~2025-03-05  7:36 UTC|newest]

Thread overview: 55+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-02-25  9:33 [PATCH v4 00/10] PCI: Enable Power and configure the TC956x PCIe switch Krishna Chaitanya Chundru
2025-02-25  9:33 ` [PATCH v4 01/10] dt-bindings: PCI: Add binding for Toshiba " Krishna Chaitanya Chundru
2025-02-25 13:23   ` Rob Herring (Arm)
2025-02-27 22:56     ` Krishna Chaitanya Chundru
2025-03-13  5:56       ` Manivannan Sadhasivam
2025-03-17  9:09         ` Krishna Chaitanya Chundru
2025-02-26  7:30   ` Krzysztof Kozlowski
2025-02-27  3:53     ` Krishna Chaitanya Chundru
2025-02-27 11:40       ` Krzysztof Kozlowski
2025-03-25 13:56     ` Konrad Dybcio
2025-04-01  5:52       ` Krishna Chaitanya Chundru
2025-04-09 13:22         ` Konrad Dybcio
2025-04-09 14:49           ` Konrad Dybcio
2025-02-25  9:33 ` [PATCH v4 02/10] arm64: dts: qcom: qcs6490-rb3gen2: Add TC956x PCIe switch node Krishna Chaitanya Chundru
2025-02-25 11:49   ` Dmitry Baryshkov
2025-03-17  9:35     ` Krishna Chaitanya Chundru
2025-03-17 11:27       ` Dmitry Baryshkov
2025-03-14 11:03   ` Dmitry Baryshkov
2025-03-17 11:27   ` Dmitry Baryshkov
2025-03-18 16:11     ` Krishna Chaitanya Chundru
2025-03-18 17:00       ` Dmitry Baryshkov
2025-03-19  3:44         ` Krishna Chaitanya Chundru
2025-03-19 10:13           ` Dmitry Baryshkov
2025-03-19 10:16             ` Krishna Chaitanya Chundru
2025-03-19 10:21               ` Dmitry Baryshkov
2025-03-19 10:46                 ` Krishna Chaitanya Chundru
2025-03-19 11:06                   ` Dmitry Baryshkov
2025-03-19 14:12                     ` Konrad Dybcio
2025-03-19 15:02                       ` Dmitry Baryshkov
2025-02-25  9:34 ` [PATCH v4 03/10] PCI: Add new start_link() & stop_link function ops Krishna Chaitanya Chundru
2025-02-25  9:34 ` [PATCH v4 04/10] PCI: dwc: Add host_start_link() & host_start_link() hooks for dwc glue drivers Krishna Chaitanya Chundru
2025-02-25  9:34 ` [PATCH v4 05/10] PCI: dwc: Implement .start_link(), .stop_link() hooks Krishna Chaitanya Chundru
2025-02-25  9:34 ` [PATCH v4 06/10] PCI: qcom: Add support for host_stop_link() & host_start_link() Krishna Chaitanya Chundru
2025-02-25  9:34 ` [PATCH v4 07/10] PCI: PCI: Add pcie_is_link_active() to determine if the PCIe link is active Krishna Chaitanya Chundru
2025-02-25  9:54   ` Lukas Wunner
2025-02-25 10:06     ` Krishna Chaitanya Chundru
2025-02-25  9:34 ` [PATCH v4 08/10] PCI: pwrctrl: Add power control driver for tc956x Krishna Chaitanya Chundru
2025-02-25 11:53   ` Dmitry Baryshkov
2025-02-25 12:09   ` Konrad Dybcio
2025-03-17  9:07     ` Krishna Chaitanya Chundru
2025-02-25  9:34 ` [PATCH v4 09/10] dt-bindings: PCI: qcom,pcie-sc7280: Add 'global' interrupt Krishna Chaitanya Chundru
2025-02-26  7:32   ` Krzysztof Kozlowski
2025-02-26 16:29     ` Bjorn Andersson
2025-02-26 21:33       ` Krzysztof Kozlowski
2025-02-27  3:39         ` Krishna Chaitanya Chundru
2025-02-27  3:48           ` Manivannan Sadhasivam
2025-03-05  7:36       ` Jorge Ramirez [this message]
2025-03-05  7:48         ` Manivannan Sadhasivam
2025-03-05 12:14         ` Krzysztof Kozlowski
2025-02-25  9:34 ` [PATCH v4 10/10] arm64: dts: qcom: sc7280: Add 'global' interrupt to the PCIe RC nodes Krishna Chaitanya Chundru
2025-02-25 11:52   ` Dmitry Baryshkov
2025-02-25 12:03   ` Konrad Dybcio
2025-02-27  3:57 ` [PATCH v4 00/10] PCI: Enable Power and configure the TC956x PCIe switch Manivannan Sadhasivam
2025-02-27  3:59   ` Manivannan Sadhasivam
2025-02-27  4:11     ` Krishna Chaitanya Chundru

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=Z8f++i4MFku8ODKf@trex \
    --to=jorge.ramirez@oss.qualcomm.com \
    --cc=amitk@kernel.org \
    --cc=andersson@kernel.org \
    --cc=bhelgaas@google.com \
    --cc=brgl@bgdev.pl \
    --cc=conor+dt@kernel.org \
    --cc=cros-qcom-dts-watchers@chromium.org \
    --cc=devicetree@vger.kernel.org \
    --cc=dmitry.baryshkov@linaro.org \
    --cc=jingoohan1@gmail.com \
    --cc=konradybcio@kernel.org \
    --cc=krishna.chundru@oss.qualcomm.com \
    --cc=krzk+dt@kernel.org \
    --cc=krzk@kernel.org \
    --cc=kw@linux.com \
    --cc=linux-arm-msm@vger.kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-pci@vger.kernel.org \
    --cc=lpieralisi@kernel.org \
    --cc=manivannan.sadhasivam@linaro.org \
    --cc=quic_krichai@quicinc.com \
    --cc=quic_vbadigan@quicnic.com \
    --cc=robh@kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox