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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?us-ascii?Q?M+ieyhrylqb91jEISVtZtRpkNCUpWfXNjWo5ei3KndHh9vQ9mOFhSC7fpHsg?= =?us-ascii?Q?/W9J3VyiXtgUGBjuO1476jk7CRUH/NdfQO8zsQBBo5nSSk1B1z5nIRxdI4kl?= =?us-ascii?Q?K1zLDHIxVF4mQ/5Mpcil1o1tWlw4i8zy2tve3Fa5C6BTIPDKryscDobqhnE/?= =?us-ascii?Q?U0kTSPiwBPLadwPxzlSlokWXiZY43D5IMUbB5MzrSvj65RqBsmSxlJxr9aGP?= =?us-ascii?Q?v6cw6gWLm7OnMRX4cOSnbpTdAVM6I4tgyijvmpOoNeysbZwA/zTLTJm0mFq+?= =?us-ascii?Q?cPtNLBUaiZvHaSCTtQRk6HPw/pckFUwDEZgSyiKKrJt+8tMloNNNMZEPBqeu?= =?us-ascii?Q?pL8xAKynxyvKbBO00+PbypNbh5nZTrLd7A932BbUGTWujE6jNPhmWHp6sIqC?= =?us-ascii?Q?nZ5MzmIB7zH4B9mBlts5ZqQVAchtSg1bxneS7vqOY2XbFO7eGMNbGkGTYVYt?= =?us-ascii?Q?jUN7O5bBT0bHQ/SRXErjB63H17AubT+dx/EE7+DPGJSRbqma9lpgvELpWrcV?= =?us-ascii?Q?A6QUEJVMOwcGhuIBA8f2V6skQRkAtqt2oUmsfSnqOXxVZGR59kGfmZgyhLIZ?= =?us-ascii?Q?MJ8mmlKcNSSYtISSeLzl7WGjr7vYJaAJjcrezaEWQ45EshDHlvnnk6vIbLAw?= =?us-ascii?Q?UlCtVnUYmy+IlNgkr0NUQK8Kja4LJaJQ7I5zfPpm5CZwvmLC7++12805qeon?= =?us-ascii?Q?DOi7TIPMqmfiztJ9haQmAh1FvtE6NsL1V2gH6tD60zI1JVs1wgtPGnHTrPfU?= =?us-ascii?Q?LMEmQkkbq9vajINLNRCYmRpcf9jd9nXR/65n03mYdEJ40rgzZBkxmIyM96fn?= =?us-ascii?Q?KTtkvZgYFRuzY7/NSEDMufRkfo2NJ1iPH5sin8k+iiO43UxgjPWUBTcfc0qA?= =?us-ascii?Q?N4QYIpVXn/q6OojsphBgUFHoJ85UE1drecmQFu0GFmcNcnOQJ+Vf+oO2zdg8?= =?us-ascii?Q?UkM8YPshXrc/9KGvHi0ez3TUVFDfjyhzYxKD+he1jQenNJb1R9Tanb2Z2atW?= =?us-ascii?Q?0+sUmJDGQtu8lrGkQHzt7gXD6n1p6zDTAoHD6eqNUeLBA19jD+iz634GEIbr?= =?us-ascii?Q?qaRFh/YEkK27OlfwmAll6SB2KsD0tdxMLdYtVpy6BHCYRPgmn222NNaftFUR?= =?us-ascii?Q?TwgaJeRkisQtLUqrF9wP2Ov9sk2kGDnOFOFyE0hcyUFLXwS1Sh0dL8jagDXb?= =?us-ascii?Q?9yCs9+oO8aE9WztBBJI25uLKGlCRnOquODNBZtbasL/OO0H7GtTPHJQg3F9e?= =?us-ascii?Q?Te4GB6CMlw7yc827MNv5FrgqFeS3l0V1AQYoW+gKVkis4WTm7T4/QJ23TzMf?= =?us-ascii?Q?6zL+Fm9uqC28QEJ1/KmWTooaRV4uQckavQRUQRMPKDWyyPEOyji/wZpptxRG?= =?us-ascii?Q?Z8lWW+7FC+ozCE7aSy93hfDaWbBwWnpy6ALO7+21vy8EwPiwz6X9NxdqUy9V?= =?us-ascii?Q?fw81BnVQjyWGf9ie+dRQSi5WnOxFrAJulsY4W3i29SFp9F5zfUQi0FM39LcX?= =?us-ascii?Q?tP2nyJWqH5TFRhQ6fcguP/2evD6VzR/Y4mwQHFARazDkCvDfJNze6qm5pDw9?= =?us-ascii?Q?46sXxdQdfVAFVx0iCeD9C2Ni203iK42euPmWe8Zy?= X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 93e8fba4-6496-441a-6f0d-08dd5d8d50df X-MS-Exchange-CrossTenant-AuthSource: PAXPR04MB9642.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 07 Mar 2025 15:32:48.6840 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: fPwP82bg1tBT3WyLIV7QTSqxeFYT1Srw6FLCYVicQ9ebKYc63xckpqYlUJtc7+pz2i/6/KlW04avTL9nZ9FA+w== X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM7PR04MB7128 On Tue, Mar 04, 2025 at 05:25:45PM -0500, Frank Li wrote: > On Tue, Mar 04, 2025 at 05:11:54PM -0500, Frank Li wrote: > > On Tue, Mar 04, 2025 at 11:50:10AM -0600, Bjorn Helgaas wrote: > > > On Mon, Mar 03, 2025 at 04:57:29PM -0500, Frank Li wrote: > > > > On Wed, Feb 26, 2025 at 06:23:26PM -0600, Bjorn Helgaas wrote: > > > > > On Tue, Jan 28, 2025 at 05:07:36PM -0500, Frank Li wrote: > > > > > > Introduce `parent_bus_offset` in `resource_entry` and a new API, > > > > > > `pci_add_resource_parent_bus_offset()`, to provide necessary information > > > > > > for PCI controllers with address translation units. > > > > > > > > > > > > Typical PCI data flow involves: > > > > > > CPU (CPU address) -> Bus Fabric (Intermediate address) -> > > > > > > PCI Controller (PCI bus address) -> PCI Bus. > > > > > > > > > > > > While most bus fabrics preserve address consistency, some modify addresses > > > > > > to intermediate values. The `parent_bus_offset` enables PCI controllers to > > > > > > translate these intermediate addresses correctly to PCI bus addresses. > > > > > > > > > > > > Pave the road to remove hardcoded cpu_addr_fixup() and similar patterns in > > > > > > PCI controller drivers. > > > > > > ... > > > > > > > > > > > +++ b/drivers/pci/of.c > > > > > > @@ -402,7 +402,17 @@ static int devm_of_pci_get_host_bridge_resources(struct device *dev, > > > > > > res->flags &= ~IORESOURCE_MEM_64; > > > > > > } > > > > > > > > > > > > - pci_add_resource_offset(resources, res, res->start - range.pci_addr); > > > > > > + /* > > > > > > + * IORESOURCE_IO res->start is io space start address. > > > > > > + * IORESOURCE_MEM res->start is cpu start address, which is the > > > > > > + * same as range.cpu_addr. > > > > > > + * > > > > > > + * Use (range.cpu_addr - range.parent_bus_addr) to align both > > > > > > + * IO and MEM's parent_bus_offset always offset to cpu address. > > > > > > + */ > > > > > > + > > > > > > + pci_add_resource_parent_bus_offset(resources, res, res->start - range.pci_addr, > > > > > > + range.cpu_addr - range.parent_bus_addr); > > > > > > > > > > I don't know exactly where it needs to go, but I think we can call > > > > > .cpu_addr_fixup() once at startup on the base of the region. This > > > > > will tell us the offset that applies to the entire region, i.e., > > > > > parent_bus_offset. > > > > > > > > > > Then we can remove all the .cpu_addr_fixup() calls in > > > > > cdns_pcie_host_init_address_translation(), > > > > > cdns_pcie_set_outbound_region(), and dw_pcie_prog_outbound_atu(). > > > > > > > > > > Until we can get rid of all the .cpu_addr_fixup() implementations, > > > > > We'll still have that single call at startup (I guess once for cadence > > > > > and another for designware), but it should simplify the current > > > > > callers quite a bit. > > > > > > > > I don't think it can simple code. cdns_pcie_set_outbound_region() and > > > > dw_pcie_prog_outbound_atu() are called by EP functions, which have not use > > > > "resource" to manage outbound windows. > > > > > > Let's ignore cadence for now. I don't think we need to solve that > > > until later. > > > > > > dw_pcie_prog_outbound_atu() is called by: > > > > > > - dw_pcie_other_conf_map_bus(): atu.parent_bus_addr = pp->cfg0_base > > > > > > I think dw_pcie_host_init() can set pp->cfg0_base with the correct > > > intermediate address, either via the the of_property_read_reg() or > > > .cpu_addr_fixup(). > > And chicken and egg problem here for artpec6_pcie_cpu_addr_fixup(), which > need cfg0_base. But try to use .cpu_addr_fixup() to get cfg0_base's > intermediate address. Bjorn: Do you have chance to check my reply? some dwc platform driver .cpu_addr_fixup() implement have dependence with old initilize sequency. Can I use original method? If change each driver's .cpu_addr_fixup() implement, it will involve more risk, even more than directly clean it as my RFC patch. Frank > > Frank > > > > > > > If dw_pcie_host_init() does this, then we don't need > > > .cpu_addr_fixup() in dw_pcie_prog_outbound_atu(). > > > > > > - dw_pcie_rd_other_conf(): atu.parent_bus_addr = pp->io_base > > > > > > Similarly, dw_pcie_host_init() should be able to set pp->io_base > > > to the intermediate address, so we don't need .cpu_addr_fixup() in > > > dw_pcie_prog_outbound_atu(). > > > > I found some driver's cpu_addr_fixup()'s implement depend on the > > initilize sequence. > > > > for example: > > pcie-artpec6.c > > > > static u64 artpec6_pcie_cpu_addr_fixup(struct dw_pcie *pci, u64 cpu_addr) > > { > > struct artpec6_pcie *artpec6_pcie = to_artpec6_pcie(pci); > > struct dw_pcie_rp *pp = &pci->pp; > > struct dw_pcie_ep *ep = &pci->ep; > > > > switch (artpec6_pcie->mode) { > > case DW_PCIE_RC_TYPE: > > return cpu_addr - pp->cfg0_base; > > case DW_PCIE_EP_TYPE: > > return cpu_addr - ep->phys_base; > > default: > > dev_err(pci->dev, "UNKNOWN device type\n"); > > } > > return cpu_addr; > > } > > > > This implement require *cfg0_base* and *phys_base*, pp/ep, need set before > > call artpec6_pcie_cpu_addr_fixup(). > > > > static u64 visconti_pcie_cpu_addr_fixup(struct dw_pcie *pci, u64 cpu_addr) > > { > > struct dw_pcie_rp *pp = &pci->pp; > > > > return cpu_addr & ~pp->io_base; > > } > > > > this one require *io_base* and *pp* need be set before call > > visconti_pcie_cpu_addr_fixup() > > > > Because I have not such hardware platform, it is not trivial change and > > it is hard to involve bugs. > > > > If move .cpu_addr_fixup() too early, it will cause kernel dump. > > > > I suggest keep current overall sequent and try to clean up these driver's > > cpu_addr_fixup() firstly. > > > > Frank > > > > > > > > - dw_pcie_iatu_setup(): atu.parent_bus_addr = entry->res->start > > > > > > Here "entry" iterates through bridge->windows, and we should be > > > able to set entry->parent_bus_offset at init-time, using > > > .cpu_addr_fixup() if necessary, so we can apply that offset > > > unconditionally, regardless of use_parent_dt_ranges, and we won't > > > need .cpu_addr_fixup() in dw_pcie_prog_outbound_atu(). > > > > > > - dw_pcie_pme_turn_off: > > > atu.parent_bus_addr = pci->pp.msg_res->start - pci->pp.msg_parent_bus_offset > > > > > > This should be the same as dw_pcie_iatu_setup() since > > > msg_parent_bus_offset comes from the window iteration in > > > dw_pcie_host_request_msg_tlp_res(). As long as the windows have > > > the correct parent_bus_offset at init-time, we should be all set.