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Thu, 13 Mar 2025 11:51:27 +0000 (GMT) Received: from nasanex01b.na.qualcomm.com (nasanex01b.na.qualcomm.com [10.46.141.250]) by NASANPPMTA05.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 52DBpQEO010042 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 13 Mar 2025 11:51:26 GMT Received: from hu-varada-blr.qualcomm.com (10.80.80.8) by nasanex01b.na.qualcomm.com (10.46.141.250) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Thu, 13 Mar 2025 04:51:22 -0700 Date: Thu, 13 Mar 2025 17:21:18 +0530 From: Varadarajan Narayanan To: Krzysztof Kozlowski CC: , , , , , , , , , , , , Subject: Re: [PATCH v13 1/4] dt-bindings: PCI: qcom: Add MHI registers for IPQ9574 Message-ID: References: <20250313080600.1719505-1-quic_varada@quicinc.com> <20250313080600.1719505-2-quic_varada@quicinc.com> <1c88f01b-4414-4f02-91ed-572a9261543a@kernel.org> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Disposition: inline In-Reply-To: <1c88f01b-4414-4f02-91ed-572a9261543a@kernel.org> X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nasanex01b.na.qualcomm.com (10.46.141.250) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Authority-Analysis: v=2.4 cv=PtWTbxM3 c=1 sm=1 tr=0 ts=67d2c6bf cx=c_pps a=JYp8KDb2vCoCEuGobkYCKw==:117 a=JYp8KDb2vCoCEuGobkYCKw==:17 a=GEpy-HfZoHoA:10 a=kj9zAlcOel0A:10 a=Vs1iUdzkB0EA:10 a=eKiS_yBL17JveMwNzzEA:9 a=CjuIK1q_8ugA:10 X-Proofpoint-GUID: bxmIp-tD8B4YV8kCoZKExp-eFGTOJZtr X-Proofpoint-ORIG-GUID: bxmIp-tD8B4YV8kCoZKExp-eFGTOJZtr X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1093,Hydra:6.0.680,FMLib:17.12.68.34 definitions=2025-03-13_05,2025-03-11_02,2024-11-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 lowpriorityscore=0 mlxscore=0 mlxlogscore=743 impostorscore=0 spamscore=0 adultscore=0 phishscore=0 bulkscore=0 clxscore=1015 malwarescore=0 suspectscore=0 classifier=spam authscore=0 authtc=n/a authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2502280000 definitions=main-2503130093 On Thu, Mar 13, 2025 at 12:01:54PM +0100, Krzysztof Kozlowski wrote: > On 13/03/2025 09:05, Varadarajan Narayanan wrote: > > Append the MHI register range to IPQ9574. This is an optional range used > > Same question, you still did not answer - does hardware have this range? > Which hardware has it? Yes. All three (ipq6018, ipq8074, ipq9574) have this range. > I pointed out that you affect at least two other variants. Your commit > msg must explain that. For example what if they do not have this range? > Then this change is just wrong. > > Start documenting the hardware, not your drivers. Since all three have this range will this commit message be ok? Append the MHI register range to ipq6018, ipq8074-gen3 & ipq9574. This is an optional range used by the dwc controller driver to print debug stats via the debugfs file 'link_transition_count'. Additionally, should I update ipq6018.dtsi and ipq8074.dtsi also and include in this patchset? Thanks Varada