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From: Abel Vesa <abel.vesa@linaro.org>
To: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Cc: Ulf Hansson <ulf.hansson@linaro.org>,
	Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Andy Gross <agross@kernel.org>,
	Bjorn Andersson <andersson@kernel.org>,
	Konrad Dybcio <konrad.dybcio@linaro.org>,
	Manivannan Sadhasivam <mani@kernel.org>,
	Alim Akhtar <alim.akhtar@samsung.com>,
	Avri Altman <avri.altman@wdc.com>,
	Bart Van Assche <bvanassche@acm.org>,
	Adrian Hunter <adrian.hunter@intel.com>,
	"James E . J . Bottomley" <jejb@linux.ibm.com>,
	"Martin K . Petersen" <martin.petersen@oracle.com>,
	Herbert Xu <herbert@gondor.apana.org.au>,
	"David S . Miller" <davem@davemloft.net>,
	Eric Biggers <ebiggers@kernel.org>,
	linux-mmc@vger.kernel.org, devicetree@vger.kernel.org,
	Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
	linux-arm-msm@vger.kernel.org, linux-crypto@vger.kernel.org,
	linux-scsi@vger.kernel.org
Subject: Re: [PATCH v5 2/6] dt-bindings: ufs: qcom: Add ICE phandle
Date: Tue, 4 Apr 2023 11:59:09 +0300	[thread overview]
Message-ID: <ZCvm3fzSh8owVDdc@linaro.org> (raw)
In-Reply-To: <9fc90c8b-9234-84fa-7dab-fee9de2b9813@linaro.org>

On 23-04-04 07:41:55, Krzysztof Kozlowski wrote:
> On 03/04/2023 22:05, Abel Vesa wrote:
> > Starting with SM8550, the ICE will have its own devicetree node
> > so add the qcom,ice property to reference it.
> > 
> > Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
> > ---
> > 
> > The v4 is here:
> > https://lore.kernel.org/all/20230327134734.3256974-4-abel.vesa@linaro.org/
> > 
> > Changes since v4:
> >  * Added check for sm8550 compatible w.r.t. qcom,ice in order to enforce
> >    it while making sure none of the other platforms are allowed to use it
> 
> Why?

SM8550 will be the first platform to use the new DT bindings w.r.t ICE.

> 
> Also, this does not solve my previous question still.

Well, the clocks are not added for the a few platforms (which include
SM8550). Same for 'ice' reg range.. So the only thing left is to
enforce the qcom,ice property availability only for SM8550. I believe
it solves the mutual exclusiveness of the "ice" reg range along with the
clocks versus the qcom,ice property, by enforcing at compatible level.

Is this not enough?

> 
> Best regards,
> Krzysztof
> 

  reply	other threads:[~2023-04-04  8:59 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-04-03 20:05 [PATCH v5 0/6] Add dedicated Qcom ICE driver Abel Vesa
2023-04-03 20:05 ` [PATCH v5 1/6] dt-bindings: crypto: Add Qualcomm Inline Crypto Engine Abel Vesa
2023-04-03 20:05 ` [PATCH v5 2/6] dt-bindings: ufs: qcom: Add ICE phandle Abel Vesa
2023-04-04  5:41   ` Krzysztof Kozlowski
2023-04-04  8:59     ` Abel Vesa [this message]
2023-04-04 10:12       ` Krzysztof Kozlowski
2023-04-04 10:41         ` Abel Vesa
2023-04-04 11:03           ` Krzysztof Kozlowski
2023-04-03 20:05 ` [PATCH v5 3/6] soc: qcom: Make the Qualcomm UFS/SDCC ICE a dedicated driver Abel Vesa
2023-04-06 20:34   ` Eric Biggers
2023-04-03 20:05 ` [PATCH v5 4/6] scsi: ufs: ufs-qcom: Switch to the new ICE API Abel Vesa
2023-04-06 20:16   ` Eric Biggers
2023-04-07  7:02     ` Abel Vesa
2023-04-07 17:28       ` Eric Biggers
2023-04-03 20:05 ` [PATCH v5 5/6] mmc: sdhci-msm: " Abel Vesa
2023-04-06 20:22   ` Eric Biggers
2023-04-03 20:05 ` [PATCH v5 6/6] arm64: dts: qcom: sm8550: Add the Inline Crypto Engine node Abel Vesa

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