* [PATCH V3 2/4] dt-bindings: clock: imx8mp: Add LDB clock entry
2023-04-03 9:46 [PATCH V3 1/4] clk: imx: imx8mp: correct DISP2 pixel clock type Peng Fan (OSS)
@ 2023-04-03 9:46 ` Peng Fan (OSS)
2023-04-03 9:42 ` Krzysztof Kozlowski
2023-04-09 13:34 ` Abel Vesa
2023-04-03 9:46 ` [PATCH V3 3/4] clk: imx: imx8mp: Add LDB root clock Peng Fan (OSS)
` (3 subsequent siblings)
4 siblings, 2 replies; 10+ messages in thread
From: Peng Fan (OSS) @ 2023-04-03 9:46 UTC (permalink / raw)
To: abelvesa, mturquette, sboyd, shawnguo, s.hauer, kernel, festevam,
robh+dt, krzysztof.kozlowski+dt
Cc: linux-imx, linux-clk, linux-arm-kernel, linux-kernel, devicetree,
Peng Fan
From: Peng Fan <peng.fan@nxp.com>
Add LDB clock entry for i.MX8MP
Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
V3:
update subject prefixes
include/dt-bindings/clock/imx8mp-clock.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/include/dt-bindings/clock/imx8mp-clock.h b/include/dt-bindings/clock/imx8mp-clock.h
index ede1f65a3147..3f28ce685f41 100644
--- a/include/dt-bindings/clock/imx8mp-clock.h
+++ b/include/dt-bindings/clock/imx8mp-clock.h
@@ -334,8 +334,8 @@
#define IMX8MP_CLK_SAI6_ROOT 326
#define IMX8MP_CLK_SAI7_ROOT 327
#define IMX8MP_CLK_PDM_ROOT 328
-
-#define IMX8MP_CLK_END 329
+#define IMX8MP_CLK_MEDIA_LDB_ROOT 329
+#define IMX8MP_CLK_END 330
#define IMX8MP_CLK_AUDIOMIX_SAI1_IPG 0
#define IMX8MP_CLK_AUDIOMIX_SAI1_MCLK1 1
--
2.37.1
^ permalink raw reply related [flat|nested] 10+ messages in thread* Re: [PATCH V3 2/4] dt-bindings: clock: imx8mp: Add LDB clock entry
2023-04-03 9:46 ` [PATCH V3 2/4] dt-bindings: clock: imx8mp: Add LDB clock entry Peng Fan (OSS)
@ 2023-04-03 9:42 ` Krzysztof Kozlowski
2023-04-09 13:34 ` Abel Vesa
1 sibling, 0 replies; 10+ messages in thread
From: Krzysztof Kozlowski @ 2023-04-03 9:42 UTC (permalink / raw)
To: Peng Fan (OSS), abelvesa, mturquette, sboyd, shawnguo, s.hauer,
kernel, festevam, robh+dt, krzysztof.kozlowski+dt
Cc: linux-imx, linux-clk, linux-arm-kernel, linux-kernel, devicetree,
Peng Fan
On 03/04/2023 11:46, Peng Fan (OSS) wrote:
> From: Peng Fan <peng.fan@nxp.com>
>
> Add LDB clock entry for i.MX8MP
>
> Signed-off-by: Peng Fan <peng.fan@nxp.com>
> ---
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH V3 2/4] dt-bindings: clock: imx8mp: Add LDB clock entry
2023-04-03 9:46 ` [PATCH V3 2/4] dt-bindings: clock: imx8mp: Add LDB clock entry Peng Fan (OSS)
2023-04-03 9:42 ` Krzysztof Kozlowski
@ 2023-04-09 13:34 ` Abel Vesa
1 sibling, 0 replies; 10+ messages in thread
From: Abel Vesa @ 2023-04-09 13:34 UTC (permalink / raw)
To: Peng Fan (OSS)
Cc: abelvesa, mturquette, sboyd, shawnguo, s.hauer, kernel, festevam,
robh+dt, krzysztof.kozlowski+dt, linux-imx, linux-clk,
linux-arm-kernel, linux-kernel, devicetree, Peng Fan
On 23-04-03 17:46:31, Peng Fan (OSS) wrote:
> From: Peng Fan <peng.fan@nxp.com>
>
> Add LDB clock entry for i.MX8MP
>
> Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Abel Vesa <abel.vesa@linaro.org>
> ---
>
> V3:
> update subject prefixes
>
> include/dt-bindings/clock/imx8mp-clock.h | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/include/dt-bindings/clock/imx8mp-clock.h b/include/dt-bindings/clock/imx8mp-clock.h
> index ede1f65a3147..3f28ce685f41 100644
> --- a/include/dt-bindings/clock/imx8mp-clock.h
> +++ b/include/dt-bindings/clock/imx8mp-clock.h
> @@ -334,8 +334,8 @@
> #define IMX8MP_CLK_SAI6_ROOT 326
> #define IMX8MP_CLK_SAI7_ROOT 327
> #define IMX8MP_CLK_PDM_ROOT 328
> -
> -#define IMX8MP_CLK_END 329
> +#define IMX8MP_CLK_MEDIA_LDB_ROOT 329
> +#define IMX8MP_CLK_END 330
>
> #define IMX8MP_CLK_AUDIOMIX_SAI1_IPG 0
> #define IMX8MP_CLK_AUDIOMIX_SAI1_MCLK1 1
> --
> 2.37.1
>
^ permalink raw reply [flat|nested] 10+ messages in thread
* [PATCH V3 3/4] clk: imx: imx8mp: Add LDB root clock
2023-04-03 9:46 [PATCH V3 1/4] clk: imx: imx8mp: correct DISP2 pixel clock type Peng Fan (OSS)
2023-04-03 9:46 ` [PATCH V3 2/4] dt-bindings: clock: imx8mp: Add LDB clock entry Peng Fan (OSS)
@ 2023-04-03 9:46 ` Peng Fan (OSS)
2023-04-09 13:35 ` Abel Vesa
2023-04-03 9:46 ` [PATCH V3 4/4] clk: imx: imx8mp: change the 'nand_usdhc_bus' clock to non-critical Peng Fan (OSS)
` (2 subsequent siblings)
4 siblings, 1 reply; 10+ messages in thread
From: Peng Fan (OSS) @ 2023-04-03 9:46 UTC (permalink / raw)
To: abelvesa, mturquette, sboyd, shawnguo, s.hauer, kernel, festevam,
robh+dt, krzysztof.kozlowski+dt
Cc: linux-imx, linux-clk, linux-arm-kernel, linux-kernel, devicetree,
Liu Ying, Sandor Yu, Dong Aisheng, Peng Fan
From: Liu Ying <victor.liu@nxp.com>
This patch adds "media_ldb_root_clk" clock for
the LDB in the MEDIAMIX subsystem.
Reviewed-by: Sandor Yu <Sandor.yu@nxp.com>
Signed-off-by: Liu Ying <victor.liu@nxp.com>
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
V3:
None
V2:
Seperate binding
drivers/clk/imx/clk-imx8mp.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/clk/imx/clk-imx8mp.c b/drivers/clk/imx/clk-imx8mp.c
index 4a0f1b739fd4..8dcaeb213277 100644
--- a/drivers/clk/imx/clk-imx8mp.c
+++ b/drivers/clk/imx/clk-imx8mp.c
@@ -696,6 +696,7 @@ static int imx8mp_clocks_probe(struct platform_device *pdev)
hws[IMX8MP_CLK_MEDIA_DISP1_PIX_ROOT] = imx_clk_hw_gate2_shared2("media_disp1_pix_root_clk", "media_disp1_pix", ccm_base + 0x45d0, 0, &share_count_media);
hws[IMX8MP_CLK_MEDIA_DISP2_PIX_ROOT] = imx_clk_hw_gate2_shared2("media_disp2_pix_root_clk", "media_disp2_pix", ccm_base + 0x45d0, 0, &share_count_media);
hws[IMX8MP_CLK_MEDIA_MIPI_PHY1_REF_ROOT] = imx_clk_hw_gate2_shared2("media_mipi_phy1_ref_root", "media_mipi_phy1_ref", ccm_base + 0x45d0, 0, &share_count_media);
+ hws[IMX8MP_CLK_MEDIA_LDB_ROOT] = imx_clk_hw_gate2_shared2("media_ldb_root_clk", "media_ldb", ccm_base + 0x45d0, 0, &share_count_media);
hws[IMX8MP_CLK_MEDIA_ISP_ROOT] = imx_clk_hw_gate2_shared2("media_isp_root_clk", "media_isp", ccm_base + 0x45d0, 0, &share_count_media);
hws[IMX8MP_CLK_USDHC3_ROOT] = imx_clk_hw_gate4("usdhc3_root_clk", "usdhc3", ccm_base + 0x45e0, 0);
--
2.37.1
^ permalink raw reply related [flat|nested] 10+ messages in thread* Re: [PATCH V3 3/4] clk: imx: imx8mp: Add LDB root clock
2023-04-03 9:46 ` [PATCH V3 3/4] clk: imx: imx8mp: Add LDB root clock Peng Fan (OSS)
@ 2023-04-09 13:35 ` Abel Vesa
0 siblings, 0 replies; 10+ messages in thread
From: Abel Vesa @ 2023-04-09 13:35 UTC (permalink / raw)
To: Peng Fan (OSS)
Cc: abelvesa, mturquette, sboyd, shawnguo, s.hauer, kernel, festevam,
robh+dt, krzysztof.kozlowski+dt, linux-imx, linux-clk,
linux-arm-kernel, linux-kernel, devicetree, Liu Ying, Sandor Yu,
Dong Aisheng, Peng Fan
On 23-04-03 17:46:32, Peng Fan (OSS) wrote:
> From: Liu Ying <victor.liu@nxp.com>
>
> This patch adds "media_ldb_root_clk" clock for
> the LDB in the MEDIAMIX subsystem.
>
> Reviewed-by: Sandor Yu <Sandor.yu@nxp.com>
> Signed-off-by: Liu Ying <victor.liu@nxp.com>
> Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
> Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Abel Vesa <abel.vesa@linaro.org>
> ---
>
> V3:
> None
> V2:
> Seperate binding
>
> drivers/clk/imx/clk-imx8mp.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/drivers/clk/imx/clk-imx8mp.c b/drivers/clk/imx/clk-imx8mp.c
> index 4a0f1b739fd4..8dcaeb213277 100644
> --- a/drivers/clk/imx/clk-imx8mp.c
> +++ b/drivers/clk/imx/clk-imx8mp.c
> @@ -696,6 +696,7 @@ static int imx8mp_clocks_probe(struct platform_device *pdev)
> hws[IMX8MP_CLK_MEDIA_DISP1_PIX_ROOT] = imx_clk_hw_gate2_shared2("media_disp1_pix_root_clk", "media_disp1_pix", ccm_base + 0x45d0, 0, &share_count_media);
> hws[IMX8MP_CLK_MEDIA_DISP2_PIX_ROOT] = imx_clk_hw_gate2_shared2("media_disp2_pix_root_clk", "media_disp2_pix", ccm_base + 0x45d0, 0, &share_count_media);
> hws[IMX8MP_CLK_MEDIA_MIPI_PHY1_REF_ROOT] = imx_clk_hw_gate2_shared2("media_mipi_phy1_ref_root", "media_mipi_phy1_ref", ccm_base + 0x45d0, 0, &share_count_media);
> + hws[IMX8MP_CLK_MEDIA_LDB_ROOT] = imx_clk_hw_gate2_shared2("media_ldb_root_clk", "media_ldb", ccm_base + 0x45d0, 0, &share_count_media);
> hws[IMX8MP_CLK_MEDIA_ISP_ROOT] = imx_clk_hw_gate2_shared2("media_isp_root_clk", "media_isp", ccm_base + 0x45d0, 0, &share_count_media);
>
> hws[IMX8MP_CLK_USDHC3_ROOT] = imx_clk_hw_gate4("usdhc3_root_clk", "usdhc3", ccm_base + 0x45e0, 0);
> --
> 2.37.1
>
^ permalink raw reply [flat|nested] 10+ messages in thread
* [PATCH V3 4/4] clk: imx: imx8mp: change the 'nand_usdhc_bus' clock to non-critical
2023-04-03 9:46 [PATCH V3 1/4] clk: imx: imx8mp: correct DISP2 pixel clock type Peng Fan (OSS)
2023-04-03 9:46 ` [PATCH V3 2/4] dt-bindings: clock: imx8mp: Add LDB clock entry Peng Fan (OSS)
2023-04-03 9:46 ` [PATCH V3 3/4] clk: imx: imx8mp: Add LDB root clock Peng Fan (OSS)
@ 2023-04-03 9:46 ` Peng Fan (OSS)
2023-04-09 13:35 ` Abel Vesa
2023-04-09 13:35 ` [PATCH V3 1/4] clk: imx: imx8mp: correct DISP2 pixel clock type Abel Vesa
2023-04-09 13:42 ` Abel Vesa
4 siblings, 1 reply; 10+ messages in thread
From: Peng Fan (OSS) @ 2023-04-03 9:46 UTC (permalink / raw)
To: abelvesa, mturquette, sboyd, shawnguo, s.hauer, kernel, festevam,
robh+dt, krzysztof.kozlowski+dt
Cc: linux-imx, linux-clk, linux-arm-kernel, linux-kernel, devicetree,
Haibo Chen, Peng Fan
From: Haibo Chen <haibo.chen@nxp.com>
The 'nand_usdhc_bus' clock is only need to be enabled when usdhc
or nand module is active, so change it to non-critical clock type.
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
V3: None
V2: None
drivers/clk/imx/clk-imx8mp.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/imx/clk-imx8mp.c b/drivers/clk/imx/clk-imx8mp.c
index 8dcaeb213277..f26ae8de4cc6 100644
--- a/drivers/clk/imx/clk-imx8mp.c
+++ b/drivers/clk/imx/clk-imx8mp.c
@@ -538,7 +538,7 @@ static int imx8mp_clocks_probe(struct platform_device *pdev)
hws[IMX8MP_CLK_MAIN_AXI] = imx8m_clk_hw_composite_bus_critical("main_axi", imx8mp_main_axi_sels, ccm_base + 0x8800);
hws[IMX8MP_CLK_ENET_AXI] = imx8m_clk_hw_composite_bus("enet_axi", imx8mp_enet_axi_sels, ccm_base + 0x8880);
- hws[IMX8MP_CLK_NAND_USDHC_BUS] = imx8m_clk_hw_composite_bus_critical("nand_usdhc_bus", imx8mp_nand_usdhc_sels, ccm_base + 0x8900);
+ hws[IMX8MP_CLK_NAND_USDHC_BUS] = imx8m_clk_hw_composite("nand_usdhc_bus", imx8mp_nand_usdhc_sels, ccm_base + 0x8900);
hws[IMX8MP_CLK_VPU_BUS] = imx8m_clk_hw_composite_bus("vpu_bus", imx8mp_vpu_bus_sels, ccm_base + 0x8980);
hws[IMX8MP_CLK_MEDIA_AXI] = imx8m_clk_hw_composite_bus("media_axi", imx8mp_media_axi_sels, ccm_base + 0x8a00);
hws[IMX8MP_CLK_MEDIA_APB] = imx8m_clk_hw_composite_bus("media_apb", imx8mp_media_apb_sels, ccm_base + 0x8a80);
--
2.37.1
^ permalink raw reply related [flat|nested] 10+ messages in thread* Re: [PATCH V3 4/4] clk: imx: imx8mp: change the 'nand_usdhc_bus' clock to non-critical
2023-04-03 9:46 ` [PATCH V3 4/4] clk: imx: imx8mp: change the 'nand_usdhc_bus' clock to non-critical Peng Fan (OSS)
@ 2023-04-09 13:35 ` Abel Vesa
0 siblings, 0 replies; 10+ messages in thread
From: Abel Vesa @ 2023-04-09 13:35 UTC (permalink / raw)
To: Peng Fan (OSS)
Cc: abelvesa, mturquette, sboyd, shawnguo, s.hauer, kernel, festevam,
robh+dt, krzysztof.kozlowski+dt, linux-imx, linux-clk,
linux-arm-kernel, linux-kernel, devicetree, Haibo Chen, Peng Fan
On 23-04-03 17:46:33, Peng Fan (OSS) wrote:
> From: Haibo Chen <haibo.chen@nxp.com>
>
> The 'nand_usdhc_bus' clock is only need to be enabled when usdhc
> or nand module is active, so change it to non-critical clock type.
>
> Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
> Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Abel Vesa <abel.vesa@linaro.org>
> ---
>
> V3: None
> V2: None
>
> drivers/clk/imx/clk-imx8mp.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/clk/imx/clk-imx8mp.c b/drivers/clk/imx/clk-imx8mp.c
> index 8dcaeb213277..f26ae8de4cc6 100644
> --- a/drivers/clk/imx/clk-imx8mp.c
> +++ b/drivers/clk/imx/clk-imx8mp.c
> @@ -538,7 +538,7 @@ static int imx8mp_clocks_probe(struct platform_device *pdev)
>
> hws[IMX8MP_CLK_MAIN_AXI] = imx8m_clk_hw_composite_bus_critical("main_axi", imx8mp_main_axi_sels, ccm_base + 0x8800);
> hws[IMX8MP_CLK_ENET_AXI] = imx8m_clk_hw_composite_bus("enet_axi", imx8mp_enet_axi_sels, ccm_base + 0x8880);
> - hws[IMX8MP_CLK_NAND_USDHC_BUS] = imx8m_clk_hw_composite_bus_critical("nand_usdhc_bus", imx8mp_nand_usdhc_sels, ccm_base + 0x8900);
> + hws[IMX8MP_CLK_NAND_USDHC_BUS] = imx8m_clk_hw_composite("nand_usdhc_bus", imx8mp_nand_usdhc_sels, ccm_base + 0x8900);
> hws[IMX8MP_CLK_VPU_BUS] = imx8m_clk_hw_composite_bus("vpu_bus", imx8mp_vpu_bus_sels, ccm_base + 0x8980);
> hws[IMX8MP_CLK_MEDIA_AXI] = imx8m_clk_hw_composite_bus("media_axi", imx8mp_media_axi_sels, ccm_base + 0x8a00);
> hws[IMX8MP_CLK_MEDIA_APB] = imx8m_clk_hw_composite_bus("media_apb", imx8mp_media_apb_sels, ccm_base + 0x8a80);
> --
> 2.37.1
>
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH V3 1/4] clk: imx: imx8mp: correct DISP2 pixel clock type
2023-04-03 9:46 [PATCH V3 1/4] clk: imx: imx8mp: correct DISP2 pixel clock type Peng Fan (OSS)
` (2 preceding siblings ...)
2023-04-03 9:46 ` [PATCH V3 4/4] clk: imx: imx8mp: change the 'nand_usdhc_bus' clock to non-critical Peng Fan (OSS)
@ 2023-04-09 13:35 ` Abel Vesa
2023-04-09 13:42 ` Abel Vesa
4 siblings, 0 replies; 10+ messages in thread
From: Abel Vesa @ 2023-04-09 13:35 UTC (permalink / raw)
To: Peng Fan (OSS)
Cc: abelvesa, mturquette, sboyd, shawnguo, s.hauer, kernel, festevam,
robh+dt, krzysztof.kozlowski+dt, linux-imx, linux-clk,
linux-arm-kernel, linux-kernel, devicetree, Peng Fan
On 23-04-03 17:46:30, Peng Fan (OSS) wrote:
> From: Peng Fan <peng.fan@nxp.com>
>
> The MEDIA_DISP2_CLK_ROOT use ccm_ahb_channel, it is bus type.
>
> Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Abel Vesa <abel.vesa@linaro.org>
> ---
>
> V1-V3:
> None
>
> drivers/clk/imx/clk-imx8mp.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/clk/imx/clk-imx8mp.c b/drivers/clk/imx/clk-imx8mp.c
> index 3253589851ff..4a0f1b739fd4 100644
> --- a/drivers/clk/imx/clk-imx8mp.c
> +++ b/drivers/clk/imx/clk-imx8mp.c
> @@ -554,7 +554,7 @@ static int imx8mp_clocks_probe(struct platform_device *pdev)
> hws[IMX8MP_CLK_AHB] = imx8m_clk_hw_composite_bus_critical("ahb_root", imx8mp_ahb_sels, ccm_base + 0x9000);
> hws[IMX8MP_CLK_AUDIO_AHB] = imx8m_clk_hw_composite_bus("audio_ahb", imx8mp_audio_ahb_sels, ccm_base + 0x9100);
> hws[IMX8MP_CLK_MIPI_DSI_ESC_RX] = imx8m_clk_hw_composite_bus("mipi_dsi_esc_rx", imx8mp_mipi_dsi_esc_rx_sels, ccm_base + 0x9200);
> - hws[IMX8MP_CLK_MEDIA_DISP2_PIX] = imx8m_clk_hw_composite("media_disp2_pix", imx8mp_media_disp_pix_sels, ccm_base + 0x9300);
> + hws[IMX8MP_CLK_MEDIA_DISP2_PIX] = imx8m_clk_hw_composite_bus("media_disp2_pix", imx8mp_media_disp_pix_sels, ccm_base + 0x9300);
>
> hws[IMX8MP_CLK_IPG_ROOT] = imx_clk_hw_divider2("ipg_root", "ahb_root", ccm_base + 0x9080, 0, 1);
>
> --
> 2.37.1
>
^ permalink raw reply [flat|nested] 10+ messages in thread* Re: [PATCH V3 1/4] clk: imx: imx8mp: correct DISP2 pixel clock type
2023-04-03 9:46 [PATCH V3 1/4] clk: imx: imx8mp: correct DISP2 pixel clock type Peng Fan (OSS)
` (3 preceding siblings ...)
2023-04-09 13:35 ` [PATCH V3 1/4] clk: imx: imx8mp: correct DISP2 pixel clock type Abel Vesa
@ 2023-04-09 13:42 ` Abel Vesa
4 siblings, 0 replies; 10+ messages in thread
From: Abel Vesa @ 2023-04-09 13:42 UTC (permalink / raw)
To: abelvesa, mturquette, sboyd, shawnguo, s.hauer, kernel, festevam,
robh+dt, krzysztof.kozlowski+dt, Peng Fan (OSS)
Cc: linux-imx, linux-clk, linux-arm-kernel, linux-kernel, devicetree,
Peng Fan
On Mon, 03 Apr 2023 17:46:30 +0800, Peng Fan (OSS) wrote:
> The MEDIA_DISP2_CLK_ROOT use ccm_ahb_channel, it is bus type.
>
>
Applied, thanks!
[1/4] clk: imx: imx8mp: correct DISP2 pixel clock type
commit: 3ea7c4c907119eb369d6b4cdec22af0434eb5304
[2/4] dt-bindings: clock: imx8mp: Add LDB clock entry
commit: 79643567cc34ebd0743f4da3ac8f853e26202453
[3/4] clk: imx: imx8mp: Add LDB root clock
commit: 82afc344d795cb467a646a2873573298162f01b9
[4/4] clk: imx: imx8mp: change the 'nand_usdhc_bus' clock to non-critical
commit: 7875ee29f877dc76dae2d04648b95811f6a05b41
Best regards,
--
Abel Vesa <abel.vesa@linaro.org>
^ permalink raw reply [flat|nested] 10+ messages in thread