[PATCH v1 0/6] arm64: qcom: sa8775p: add support for USB

[PATCH v1 0/6] arm64: qcom: sa8775p: add support for USB

[Shazad Hussain]

Update relavent DT bindings for USB, add new config to the phy driver,
add USB and PHY nodes to the .dtsi and enable them in the board .dts
for the sa8775p-ride platform.

Shazad Hussain (6):
  dt-bindings: usb: qcom,dwc3: Add bindings for SA8775P
  dt-bindings: phy: qcom,usb-snps-femto-v2: Add bindings for SA8775P
  dt-bindings: phy: qcom,sc8280xp-qmp-usb3-uni: Add SA8775P USB PHY
    binding
  phy: qcom-qmp: Add SA8775P USB3 UNI phy
  arm64: dts: qcom: sa8775p: add USB nodes
  arm64: dts: qcom: sa8775p-ride: enable USB nodes

 .../phy/qcom,sc8280xp-qmp-usb3-uni-phy.yaml   |   1 +
 .../bindings/phy/qcom,usb-snps-femto-v2.yaml  |   1 +
 .../devicetree/bindings/usb/qcom,dwc3.yaml    |   5 +
 arch/arm64/boot/dts/qcom/sa8775p-ride.dts     |  92 +++++++
 arch/arm64/boot/dts/qcom/sa8775p.dtsi         | 239 +++++++++++++++++-
 drivers/phy/qualcomm/phy-qcom-qmp-usb.c       |  45 ++++
 6 files changed, 381 insertions(+), 2 deletions(-)

-- 
2.17.1

[PATCH v1 1/6] dt-bindings: usb: qcom,dwc3: Add bindings for SA8775P

[Shazad Hussain]

Add the compatible string for SA8775P SoC from Qualcomm.

Set minItems to 3 for interrupts as usb2 i.e third usb port supports
only high speed mode and does not require ss_phy_irq.

Signed-off-by: Shazad Hussain <quic_shazhuss@quicinc.com>
---
 Documentation/devicetree/bindings/usb/qcom,dwc3.yaml | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml b/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml
index d84281926f10..3ae02cffae49 100644
--- a/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml
+++ b/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml
@@ -23,6 +23,7 @@ properties:
           - qcom,msm8998-dwc3
           - qcom,qcm2290-dwc3
           - qcom,qcs404-dwc3
+          - qcom,sa8775p-dwc3
           - qcom,sc7180-dwc3
           - qcom,sc7280-dwc3
           - qcom,sc8280xp-dwc3
@@ -180,6 +181,7 @@ allOf:
               - qcom,msm8953-dwc3
               - qcom,msm8996-dwc3
               - qcom,msm8998-dwc3
+              - qcom,sa8775p-dwc3
               - qcom,sc7180-dwc3
               - qcom,sc7280-dwc3
               - qcom,sdm670-dwc3
@@ -443,12 +445,15 @@ allOf:
         compatible:
           contains:
             enum:
+              - qcom,sa8775p-dwc3
               - qcom,sc8280xp-dwc3
     then:
       properties:
         interrupts:
+          minItems: 3
           maxItems: 4
         interrupt-names:
+          minItems: 3
           items:
             - const: pwr_event
             - const: dp_hs_phy_irq
-- 
2.17.1

[PATCH v1 2/6] dt-bindings: phy: qcom,usb-snps-femto-v2: Add bindings for SA8775P

[Shazad Hussain]

Document the compatible string for USB phy found in Qualcomm SA8775P SoC

Signed-off-by: Shazad Hussain <quic_shazhuss@quicinc.com>
---
 .../devicetree/bindings/phy/qcom,usb-snps-femto-v2.yaml          | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/phy/qcom,usb-snps-femto-v2.yaml b/Documentation/devicetree/bindings/phy/qcom,usb-snps-femto-v2.yaml
index a26524b7e7b7..0f200e3f97a9 100644
--- a/Documentation/devicetree/bindings/phy/qcom,usb-snps-femto-v2.yaml
+++ b/Documentation/devicetree/bindings/phy/qcom,usb-snps-femto-v2.yaml
@@ -20,6 +20,7 @@ properties:
           - qcom,usb-snps-femto-v2-phy
       - items:
           - enum:
+              - qcom,sa8775p-usb-hs-phy
               - qcom,sc8280xp-usb-hs-phy
           - const: qcom,usb-snps-hs-5nm-phy
       - items:
-- 
2.17.1

[PATCH v1 3/6] dt-bindings: phy: qcom,sc8280xp-qmp-usb3-uni: Add SA8775P USB PHY binding

[Shazad Hussain]

Add compatible string for Qualcomm QMP Super Speed (SS) UNI PHY found
in SA8775P.

Signed-off-by: Shazad Hussain <quic_shazhuss@quicinc.com>
---
 .../devicetree/bindings/phy/qcom,sc8280xp-qmp-usb3-uni-phy.yaml  | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb3-uni-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb3-uni-phy.yaml
index 16fce1038285..c61cea4835bb 100644
--- a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb3-uni-phy.yaml
+++ b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb3-uni-phy.yaml
@@ -16,6 +16,7 @@ description:
 properties:
   compatible:
     enum:
+      - qcom,sa8775p-qmp-usb3-uni-phy
       - qcom,sc8280xp-qmp-usb3-uni-phy
 
   reg:
-- 
2.17.1

[PATCH v1 4/6] phy: qcom-qmp: Add SA8775P USB3 UNI phy

[Shazad Hussain]

The SA8775P platform has 5nm USB3 UNI phy attached to the USB0 and USB1
controllers.

Add QMP PHY config, pcs entries and support for the new compatible for
SA8775P platform.

Signed-off-by: Shazad Hussain <quic_shazhuss@quicinc.com>
---
 drivers/phy/qualcomm/phy-qcom-qmp-usb.c | 45 +++++++++++++++++++++++++
 1 file changed, 45 insertions(+)

diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-usb.c b/drivers/phy/qualcomm/phy-qcom-qmp-usb.c
index a49711c5a63d..5c039bbbe036 100644
--- a/drivers/phy/qualcomm/phy-qcom-qmp-usb.c
+++ b/drivers/phy/qualcomm/phy-qcom-qmp-usb.c
@@ -1408,6 +1408,26 @@ static const struct qmp_phy_init_tbl sc8280xp_usb3_uniphy_pcs_tbl[] = {
 	QMP_PHY_INIT_CFG(QPHY_V5_PCS_REFGEN_REQ_CONFIG1, 0x21),
 };
 
+static const struct qmp_phy_init_tbl sa8775p_usb3_uniphy_pcs_tbl[] = {
+	QMP_PHY_INIT_CFG(QPHY_V5_PCS_LOCK_DETECT_CONFIG1, 0xc4),
+	QMP_PHY_INIT_CFG(QPHY_V5_PCS_LOCK_DETECT_CONFIG2, 0x89),
+	QMP_PHY_INIT_CFG(QPHY_V5_PCS_LOCK_DETECT_CONFIG3, 0x20),
+	QMP_PHY_INIT_CFG(QPHY_V5_PCS_LOCK_DETECT_CONFIG6, 0x13),
+	QMP_PHY_INIT_CFG(QPHY_V5_PCS_RCVR_DTCT_DLY_P1U2_L, 0xe7),
+	QMP_PHY_INIT_CFG(QPHY_V5_PCS_RCVR_DTCT_DLY_P1U2_H, 0x03),
+	QMP_PHY_INIT_CFG(QPHY_V5_PCS_RX_SIGDET_LVL, 0xaa),
+	QMP_PHY_INIT_CFG(QPHY_V5_PCS_PCS_TX_RX_CONFIG, 0x0c),
+	QMP_PHY_INIT_CFG(QPHY_V5_PCS_USB3_RXEQTRAINING_DFE_TIME_S2, 0x07),
+	QMP_PHY_INIT_CFG(QPHY_V5_PCS_USB3_LFPS_DET_HIGH_COUNT_VAL, 0xf8),
+	QMP_PHY_INIT_CFG(QPHY_V5_PCS_USB3_POWER_STATE_CONFIG1, 0x6f),
+	QMP_PHY_INIT_CFG(QPHY_V5_PCS_CDR_RESET_TIME, 0x0a),
+	QMP_PHY_INIT_CFG(QPHY_V5_PCS_ALIGN_DETECT_CONFIG1, 0x88),
+	QMP_PHY_INIT_CFG(QPHY_V5_PCS_ALIGN_DETECT_CONFIG2, 0x13),
+	QMP_PHY_INIT_CFG(QPHY_V5_PCS_EQ_CONFIG1, 0x4b),
+	QMP_PHY_INIT_CFG(QPHY_V5_PCS_EQ_CONFIG5, 0x10),
+	QMP_PHY_INIT_CFG(QPHY_V5_PCS_REFGEN_REQ_CONFIG1, 0x21),
+};
+
 struct qmp_usb_offsets {
 	u16 serdes;
 	u16 pcs;
@@ -1629,6 +1649,28 @@ static const struct qmp_phy_cfg qmp_v3_usb3phy_cfg = {
 	.has_phy_dp_com_ctrl	= true,
 };
 
+static const struct qmp_phy_cfg sa8775p_usb3_uniphy_cfg = {
+	.lanes			= 1,
+
+	.offsets		= &qmp_usb_offsets_v5,
+
+	.serdes_tbl		= sc8280xp_usb3_uniphy_serdes_tbl,
+	.serdes_tbl_num		= ARRAY_SIZE(sc8280xp_usb3_uniphy_serdes_tbl),
+	.tx_tbl			= sc8280xp_usb3_uniphy_tx_tbl,
+	.tx_tbl_num		= ARRAY_SIZE(sc8280xp_usb3_uniphy_tx_tbl),
+	.rx_tbl			= sc8280xp_usb3_uniphy_rx_tbl,
+	.rx_tbl_num		= ARRAY_SIZE(sc8280xp_usb3_uniphy_rx_tbl),
+	.pcs_tbl		= sa8775p_usb3_uniphy_pcs_tbl,
+	.pcs_tbl_num		= ARRAY_SIZE(sa8775p_usb3_uniphy_pcs_tbl),
+	.clk_list		= qmp_v4_phy_clk_l,
+	.num_clks		= ARRAY_SIZE(qmp_v4_phy_clk_l),
+	.reset_list		= qcm2290_usb3phy_reset_l,
+	.num_resets		= ARRAY_SIZE(qcm2290_usb3phy_reset_l),
+	.vreg_list		= qmp_phy_vreg_l,
+	.num_vregs		= ARRAY_SIZE(qmp_phy_vreg_l),
+	.regs			= qmp_v5_usb3phy_regs_layout,
+};
+
 static const struct qmp_phy_cfg sc7180_usb3phy_cfg = {
 	.lanes			= 2,
 
@@ -2597,6 +2639,9 @@ static const struct of_device_id qmp_usb_of_match_table[] = {
 	}, {
 		.compatible = "qcom,qcm2290-qmp-usb3-phy",
 		.data = &qcm2290_usb3phy_cfg,
+	}, {
+		.compatible = "qcom,sa8775p-qmp-usb3-uni-phy",
+		.data = &sa8775p_usb3_uniphy_cfg,
 	}, {
 		.compatible = "qcom,sc7180-qmp-usb3-phy",
 		.data = &sc7180_usb3phy_cfg,
-- 
2.17.1

[PATCH v1 5/6] arm64: dts: qcom: sa8775p: add USB nodes

[Shazad Hussain]

Add nodes for the USB and it's PHY on sa8775p platform.

Signed-off-by: Shazad Hussain <quic_shazhuss@quicinc.com>
---
 arch/arm64/boot/dts/qcom/sa8775p.dtsi | 239 +++++++++++++++++++++++++-
 1 file changed, 237 insertions(+), 2 deletions(-)

diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/dts/qcom/sa8775p.dtsi
index 2343df7e0ea4..47b6936d638c 100644
--- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi
+++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi
@@ -452,8 +452,8 @@
 				 <0>,
 				 <0>,
 				 <0>,
-				 <0>,
-				 <0>,
+				 <&usb_0_qmpphy>,
+				 <&usb_1_qmpphy>,
 				 <0>,
 				 <0>,
 				 <0>,
@@ -585,6 +585,241 @@
 			};
 		};
 
+		usb_0_hsphy: phy@88e4000 {
+			compatible = "qcom,sa8775p-usb-hs-phy",
+				     "qcom,usb-snps-hs-5nm-phy";
+			reg = <0 0x088e4000 0 0x120>;
+			clocks = <&rpmhcc RPMH_CXO_CLK>;
+			clock-names = "ref";
+			resets = <&gcc GCC_USB2_PHY_PRIM_BCR>;
+
+			#phy-cells = <0>;
+
+			status = "disabled";
+		};
+
+		usb_0_qmpphy: phy@88e8000 {
+			compatible = "qcom,sa8775p-qmp-usb3-uni-phy";
+			reg = <0 0x088e8000 0 0x2000>;
+
+			clocks = <&gcc GCC_USB3_PRIM_PHY_AUX_CLK>,
+				 <&gcc GCC_USB_CLKREF_EN>,
+				 <&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>,
+				 <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>;
+			clock-names = "aux", "ref", "com_aux", "pipe";
+
+			resets = <&gcc GCC_USB3_PHY_PRIM_BCR>,
+				 <&gcc GCC_USB3PHY_PHY_PRIM_BCR>;
+			reset-names = "phy", "phy_phy";
+
+			power-domains = <&gcc USB30_PRIM_GDSC>;
+
+			#clock-cells = <0>;
+			clock-output-names = "usb3_prim_phy_pipe_clk_src";
+
+			#phy-cells = <0>;
+
+			status = "disabled";
+		};
+
+		usb_0: usb@a6f8800 {
+			compatible = "qcom,sa8775p-dwc3", "qcom,dwc3";
+			reg = <0 0x0a6f8800 0 0x400>;
+			#address-cells = <2>;
+			#size-cells = <2>;
+			ranges;
+
+			clocks = <&gcc GCC_CFG_NOC_USB3_PRIM_AXI_CLK>,
+				 <&gcc GCC_USB30_PRIM_MASTER_CLK>,
+				 <&gcc GCC_AGGRE_USB3_PRIM_AXI_CLK>,
+				 <&gcc GCC_USB30_PRIM_SLEEP_CLK>,
+				 <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>;
+			clock-names = "cfg_noc", "core", "iface", "sleep", "mock_utmi";
+
+			assigned-clocks = <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>,
+					  <&gcc GCC_USB30_PRIM_MASTER_CLK>;
+			assigned-clock-rates = <19200000>, <200000000>;
+
+			interrupts-extended = <&intc GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>,
+					      <&pdc 14 IRQ_TYPE_EDGE_RISING>,
+					      <&pdc 15 IRQ_TYPE_EDGE_RISING>,
+					      <&pdc 12 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "pwr_event",
+					  "dp_hs_phy_irq",
+					  "dm_hs_phy_irq",
+					  "ss_phy_irq";
+
+			power-domains = <&gcc USB30_PRIM_GDSC>;
+			required-opps = <&rpmhpd_opp_nom>;
+
+			resets = <&gcc GCC_USB30_PRIM_BCR>;
+
+			interconnects = <&aggre1_noc MASTER_USB3_0 0 &mc_virt SLAVE_EBI1 0>,
+					<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_USB3_0 0>;
+			interconnect-names = "usb-ddr", "apps-usb";
+
+			wakeup-source;
+
+			status = "disabled";
+
+			usb_0_dwc3: usb@a600000 {
+				compatible = "snps,dwc3";
+				reg = <0 0x0a600000 0 0xe000>;
+				interrupts = <GIC_SPI 292 IRQ_TYPE_LEVEL_HIGH>;
+				iommus = <&apps_smmu 0x080 0x0>;
+				phys = <&usb_0_hsphy>, <&usb_0_qmpphy>;
+				phy-names = "usb2-phy", "usb3-phy";
+			};
+		};
+
+		usb_1_hsphy: phy@88e6000 {
+			compatible = "qcom,sa8775p-usb-hs-phy",
+				     "qcom,usb-snps-hs-5nm-phy";
+			reg = <0 0x088e6000 0 0x120>;
+			clocks = <&gcc GCC_USB_CLKREF_EN>;
+			clock-names = "ref";
+			resets = <&gcc GCC_USB2_PHY_SEC_BCR>;
+
+			#phy-cells = <0>;
+
+			status = "disabled";
+		};
+
+		usb_1_qmpphy: phy@88ea000 {
+			compatible = "qcom,sa8775p-qmp-usb3-uni-phy";
+			reg = <0 0x088ea000 0 0x2000>;
+
+			clocks = <&gcc GCC_USB3_SEC_PHY_AUX_CLK>,
+				 <&gcc GCC_USB_CLKREF_EN>,
+				 <&gcc GCC_USB3_SEC_PHY_COM_AUX_CLK>,
+				 <&gcc GCC_USB3_SEC_PHY_PIPE_CLK>;
+			clock-names = "aux", "ref", "com_aux", "pipe";
+
+			resets = <&gcc GCC_USB3_PHY_SEC_BCR>,
+				 <&gcc GCC_USB3PHY_PHY_SEC_BCR>;
+			reset-names = "phy", "phy_phy";
+
+			power-domains = <&gcc USB30_SEC_GDSC>;
+
+			#clock-cells = <0>;
+			clock-output-names = "usb3_sec_phy_pipe_clk_src";
+
+			#phy-cells = <0>;
+
+			status = "disabled";
+		};
+
+		usb_1: usb@a8f8800 {
+			compatible = "qcom,sa8775p-dwc3", "qcom,dwc3";
+			reg = <0 0x0a8f8800 0 0x400>;
+			#address-cells = <2>;
+			#size-cells = <2>;
+			ranges;
+
+			clocks = <&gcc GCC_CFG_NOC_USB3_SEC_AXI_CLK>,
+				 <&gcc GCC_USB30_SEC_MASTER_CLK>,
+				 <&gcc GCC_AGGRE_USB3_SEC_AXI_CLK>,
+				 <&gcc GCC_USB30_SEC_SLEEP_CLK>,
+				 <&gcc GCC_USB30_SEC_MOCK_UTMI_CLK>;
+			clock-names = "cfg_noc", "core", "iface", "sleep", "mock_utmi";
+
+			assigned-clocks = <&gcc GCC_USB30_SEC_MOCK_UTMI_CLK>,
+					  <&gcc GCC_USB30_SEC_MASTER_CLK>;
+			assigned-clock-rates = <19200000>, <200000000>;
+
+			interrupts-extended = <&intc GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>,
+					      <&pdc 8 IRQ_TYPE_EDGE_RISING>,
+					      <&pdc 7 IRQ_TYPE_EDGE_RISING>,
+					      <&pdc 13 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "pwr_event",
+					  "dp_hs_phy_irq",
+					  "dm_hs_phy_irq",
+					  "ss_phy_irq";
+
+			power-domains = <&gcc USB30_SEC_GDSC>;
+			required-opps = <&rpmhpd_opp_nom>;
+
+			resets = <&gcc GCC_USB30_SEC_BCR>;
+
+			interconnects = <&aggre1_noc MASTER_USB3_1 0 &mc_virt SLAVE_EBI1 0>,
+					<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_USB3_1 0>;
+			interconnect-names = "usb-ddr", "apps-usb";
+
+			wakeup-source;
+
+			status = "disabled";
+
+			usb_1_dwc3: usb@a800000 {
+				compatible = "snps,dwc3";
+				reg = <0 0x0a800000 0 0xe000>;
+				interrupts = <GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>;
+				iommus = <&apps_smmu 0x0a0 0x0>;
+				phys = <&usb_1_hsphy>, <&usb_1_qmpphy>;
+				phy-names = "usb2-phy", "usb3-phy";
+			};
+		};
+
+		usb_2_hsphy: phy@88e7000 {
+			compatible = "qcom,sa8775p-usb-hs-phy",
+				     "qcom,usb-snps-hs-5nm-phy";
+			reg = <0 0x088e7000 0 0x120>;
+			clocks = <&gcc GCC_USB_CLKREF_EN>;
+			clock-names = "ref";
+			resets = <&gcc GCC_USB3_PHY_TERT_BCR>;
+
+			#phy-cells = <0>;
+
+			status = "disabled";
+		};
+
+		usb_2: usb@a4f8800 {
+			compatible = "qcom,sa8775p-dwc3", "qcom,dwc3";
+			reg = <0 0x0a4f8800 0 0x400>;
+			#address-cells = <2>;
+			#size-cells = <2>;
+			ranges;
+
+			clocks = <&gcc GCC_CFG_NOC_USB2_PRIM_AXI_CLK>,
+				 <&gcc GCC_USB20_MASTER_CLK>,
+				 <&gcc GCC_AGGRE_USB2_PRIM_AXI_CLK>,
+				 <&gcc GCC_USB20_SLEEP_CLK>,
+				 <&gcc GCC_USB20_MOCK_UTMI_CLK>;
+			clock-names = "cfg_noc", "core", "iface", "sleep", "mock_utmi";
+
+			assigned-clocks = <&gcc GCC_USB20_MOCK_UTMI_CLK>,
+					  <&gcc GCC_USB20_MASTER_CLK>;
+			assigned-clock-rates = <19200000>, <200000000>;
+
+			interrupts-extended = <&intc GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>,
+					      <&pdc 10 IRQ_TYPE_EDGE_RISING>,
+					      <&pdc 9 IRQ_TYPE_EDGE_RISING>;
+			interrupt-names = "pwr_event",
+					  "dp_hs_phy_irq",
+					  "dm_hs_phy_irq";
+
+			power-domains = <&gcc USB20_PRIM_GDSC>;
+			required-opps = <&rpmhpd_opp_nom>;
+
+			resets = <&gcc GCC_USB20_PRIM_BCR>;
+
+			interconnects = <&aggre1_noc MASTER_USB2 0 &mc_virt SLAVE_EBI1 0>,
+					<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_USB2 0>;
+			interconnect-names = "usb-ddr", "apps-usb";
+
+			wakeup-source;
+
+			status = "disabled";
+
+			usb_2_dwc3: usb@a400000 {
+				compatible = "snps,dwc3";
+				reg = <0 0x0a400000 0 0xe000>;
+				interrupts = <GIC_SPI 442 IRQ_TYPE_LEVEL_HIGH>;
+				iommus = <&apps_smmu 0x020 0x0>;
+				phys = <&usb_2_hsphy>;
+				phy-names = "usb2-phy";
+			};
+		};
+
 		tcsr_mutex: hwlock@1f40000 {
 			compatible = "qcom,tcsr-mutex";
 			reg = <0x0 0x01f40000 0x0 0x20000>;
-- 
2.17.1

[PATCH v1 6/6] arm64: dts: qcom: sa8775p-ride: enable USB nodes

[Shazad Hussain]

Enable usb0, usb1 and usb2 nodes and their respective phy's.

Signed-off-by: Shazad Hussain <quic_shazhuss@quicinc.com>
---
 arch/arm64/boot/dts/qcom/sa8775p-ride.dts | 92 +++++++++++++++++++++++
 1 file changed, 92 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/sa8775p-ride.dts b/arch/arm64/boot/dts/qcom/sa8775p-ride.dts
index f238a02a5448..13ac60ddd170 100644
--- a/arch/arm64/boot/dts/qcom/sa8775p-ride.dts
+++ b/arch/arm64/boot/dts/qcom/sa8775p-ride.dts
@@ -291,6 +291,13 @@
 			  "BT_EN",
 			  "USB2_PWR_EN",
 			  "USB2_FAULT";
+
+	usb2_en_state: usb2-en-state {
+		pins = "gpio9";
+		function = "normal";
+		output-high;
+		power-source = <0>;
+	};
 };
 
 &pmm8654au_2_gpios {
@@ -306,6 +313,20 @@
 			  "USB1_PWR_ENABLE",
 			  "USB1_FAULT",
 			  "VMON_SPX8";
+
+	usb0_en_state: usb0-en-state {
+		pins = "gpio3";
+		function = "normal";
+		output-high;
+		power-source = <0>;
+	};
+
+	usb1_en_state: usb1-en-state {
+		pins = "gpio10";
+		function = "normal";
+		output-high;
+		power-source = <0>;
+	};
 };
 
 &pmm8654au_3_gpios {
@@ -426,6 +447,77 @@
 	status = "okay";
 };
 
+&usb_0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&usb0_en_state>;
+
+	status = "okay";
+};
+
+&usb_0_dwc3 {
+	dr_mode = "peripheral";
+};
+
+&usb_0_hsphy {
+	vdda-pll-supply = <&vreg_l7a>;
+	vdda18-supply = <&vreg_l6c>;
+	vdda33-supply = <&vreg_l9a>;
+
+	status = "okay";
+};
+
+&usb_0_qmpphy {
+	vdda-phy-supply = <&vreg_l1c>;
+	vdda-pll-supply = <&vreg_l7a>;
+
+	status = "okay";
+};
+
+&usb_1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&usb1_en_state>;
+
+	status = "okay";
+};
+
+&usb_1_dwc3 {
+	dr_mode = "host";
+};
+
+&usb_1_hsphy {
+	vdda-pll-supply = <&vreg_l7a>;
+	vdda18-supply = <&vreg_l6c>;
+	vdda33-supply = <&vreg_l9a>;
+
+	status = "okay";
+};
+
+&usb_1_qmpphy {
+	vdda-phy-supply = <&vreg_l1c>;
+	vdda-pll-supply = <&vreg_l7a>;
+
+	status = "okay";
+};
+
+&usb_2 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&usb2_en_state>;
+
+	status = "okay";
+};
+
+&usb_2_dwc3 {
+	dr_mode = "host";
+};
+
+&usb_2_hsphy {
+	vdda-pll-supply = <&vreg_l7a>;
+	vdda18-supply = <&vreg_l6c>;
+	vdda33-supply = <&vreg_l9a>;
+
+	status = "okay";
+};
+
 &xo_board_clk {
 	clock-frequency = <38400000>;
 };
-- 
2.17.1

Re: [PATCH v1 4/6] phy: qcom-qmp: Add SA8775P USB3 UNI phy

[Dmitry Baryshkov]

On Fri, 21 Apr 2023 at 16:41, Shazad Hussain <quic_shazhuss@quicinc.com> wrote:
>
> The SA8775P platform has 5nm USB3 UNI phy attached to the USB0 and USB1
> controllers.
>
> Add QMP PHY config, pcs entries and support for the new compatible for
> SA8775P platform.
>
> Signed-off-by: Shazad Hussain <quic_shazhuss@quicinc.com>
> ---
>  drivers/phy/qualcomm/phy-qcom-qmp-usb.c | 45 +++++++++++++++++++++++++
>  1 file changed, 45 insertions(+)
>

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>

-- 
With best wishes
Dmitry

Re: [PATCH v1 6/6] arm64: dts: qcom: sa8775p-ride: enable USB nodes

[Dmitry Baryshkov]

On Fri, 21 Apr 2023 at 16:41, Shazad Hussain <quic_shazhuss@quicinc.com> wrote:
>
> Enable usb0, usb1 and usb2 nodes and their respective phy's.
>
> Signed-off-by: Shazad Hussain <quic_shazhuss@quicinc.com>
> ---
>  arch/arm64/boot/dts/qcom/sa8775p-ride.dts | 92 +++++++++++++++++++++++
>  1 file changed, 92 insertions(+)

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>

-- 
With best wishes
Dmitry

Re: [PATCH v1 0/6] arm64: qcom: sa8775p: add support for USB

[Adrien Thierry]

Hi Shazad,

On Fri, Apr 21, 2023 at 07:09:15PM +0530, Shazad Hussain wrote:
> Update relavent DT bindings for USB, add new config to the phy driver,
> add USB and PHY nodes to the .dtsi and enable them in the board .dts
> for the sa8775p-ride platform.
> 
> Shazad Hussain (6):
>   dt-bindings: usb: qcom,dwc3: Add bindings for SA8775P
>   dt-bindings: phy: qcom,usb-snps-femto-v2: Add bindings for SA8775P
>   dt-bindings: phy: qcom,sc8280xp-qmp-usb3-uni: Add SA8775P USB PHY
>     binding
>   phy: qcom-qmp: Add SA8775P USB3 UNI phy
>   arm64: dts: qcom: sa8775p: add USB nodes
>   arm64: dts: qcom: sa8775p-ride: enable USB nodes
> 
>  .../phy/qcom,sc8280xp-qmp-usb3-uni-phy.yaml   |   1 +
>  .../bindings/phy/qcom,usb-snps-femto-v2.yaml  |   1 +
>  .../devicetree/bindings/usb/qcom,dwc3.yaml    |   5 +
>  arch/arm64/boot/dts/qcom/sa8775p-ride.dts     |  92 +++++++
>  arch/arm64/boot/dts/qcom/sa8775p.dtsi         | 239 +++++++++++++++++-
>  drivers/phy/qualcomm/phy-qcom-qmp-usb.c       |  45 ++++
>  6 files changed, 381 insertions(+), 2 deletions(-)
> 
> -- 
> 2.17.1
> 

Thanks for posting this. I tested the series on the sa8775p, and it seems
initialization for the controller at a400000 sometimes fails with a
timeout (-110) error:

    dwc3 a400000.usb: Adding to iommu group 2
    xhci-hcd xhci-hcd.0.auto: xHCI Host Controller
    xhci-hcd xhci-hcd.0.auto: new USB bus registered, assigned bus number 1
    xhci-hcd xhci-hcd.0.auto: can't setup: -110
    xhci-hcd xhci-hcd.0.auto: USB bus 1 deregistered
    xhci-hcd: probe of xhci-hcd.0.auto failed with error -110
    dwc3 a600000.usb: Adding to iommu group 3
    dwc3 a800000.usb: Adding to iommu group 4
    xhci-hcd xhci-hcd.1.auto: xHCI Host Controller
    xhci-hcd xhci-hcd.1.auto: new USB bus registered, assigned bus number 1
    xhci-hcd xhci-hcd.1.auto: hcc params 0x0110ffc5 hci version 0x110 quirks 0x0000000000010010
    xhci-hcd xhci-hcd.1.auto: irq 162, io mem 0x0a800000
    xhci-hcd xhci-hcd.1.auto: xHCI Host Controller
    xhci-hcd xhci-hcd.1.auto: new USB bus registered, assigned bus number 2
    xhci-hcd xhci-hcd.1.auto: Host supports USB 3.1 Enhanced SuperSpeed
    hub 1-0:1.0: USB hub found
    hub 1-0:1.0: 1 port detected
    usb usb2: We don't know the algorithms for LPM for this host, disabling LPM.
    hub 2-0:1.0: USB hub found
    hub 2-0:1.0: 1 port detected

In this case, only usb devices for a800000 are showing:

    dracut:/# ls -alh /sys/bus/usb/devices
    total 0
    drwxr-xr-x 2 root root 0 Feb 27 00:00 .
    drwxr-xr-x 4 root root 0 Feb 27 00:00 ..
    lrwxrwxrwx 1 root root 0 Feb 27 00:00 1-0:1.0 -> ../../../devices/platform/soc@0/a8f8800.usb/a800000.usb/xhci-hcd.1.auto/usb1/1-0:1.0
    lrwxrwxrwx 1 root root 0 Feb 27 00:00 2-0:1.0 -> ../../../devices/platform/soc@0/a8f8800.usb/a800000.usb/xhci-hcd.1.auto/usb2/2-0:1.0
    lrwxrwxrwx 1 root root 0 Feb 27 00:00 usb1 -> ../../../devices/platform/soc@0/a8f8800.usb/a800000.usb/xhci-hcd.1.auto/usb1
    lrwxrwxrwx 1 root root 0 Feb 27 00:00 usb2 -> ../../../devices/platform/soc@0/a8f8800.usb/a800000.usb/xhci-hcd.1.auto/usb2

This happens approximately 1 out of 2 reboots. Here's the kernel output
when initialization succeeds:

    dwc3 a600000.usb: Adding to iommu group 2
    dwc3 a800000.usb: Adding to iommu group 3
    xhci-hcd xhci-hcd.0.auto: xHCI Host Controller
    xhci-hcd xhci-hcd.0.auto: new USB bus registered, assigned bus number 1
    xhci-hcd xhci-hcd.0.auto: hcc params 0x0110ffc5 hci version 0x110 quirks 0x0000000000010010
    xhci-hcd xhci-hcd.0.auto: irq 161, io mem 0x0a800000
    xhci-hcd xhci-hcd.0.auto: xHCI Host Controller
    xhci-hcd xhci-hcd.0.auto: new USB bus registered, assigned bus number 2
    xhci-hcd xhci-hcd.0.auto: Host supports USB 3.1 Enhanced SuperSpeed
    hub 1-0:1.0: USB hub found
    hub 1-0:1.0: 1 port detected
    usb usb2: We don't know the algorithms for LPM for this host, disabling LPM.
    hub 2-0:1.0: USB hub found
    hub 2-0:1.0: 1 port detected
    dwc3 a400000.usb: Adding to iommu group 4
    xhci-hcd xhci-hcd.1.auto: xHCI Host Controller
    xhci-hcd xhci-hcd.1.auto: new USB bus registered, assigned bus number 3
    xhci-hcd xhci-hcd.1.auto: USB3 root hub has no ports
    xhci-hcd xhci-hcd.1.auto: hcc params 0x0220fe65 hci version 0x110 quirks 0x0000000000010010
    xhci-hcd xhci-hcd.1.auto: irq 162, io mem 0x0a400000
    hub 3-0:1.0: USB hub found
    hub 3-0:1.0: 1 port detected

And the list of usb devices:

    dracut:/# ls -alh /sys/bus/usb/devices
    total 0
    drwxr-xr-x 2 root root 0 Feb 27 00:00 .
    drwxr-xr-x 4 root root 0 Feb 27 00:00 ..
    lrwxrwxrwx 1 root root 0 Feb 27 00:00 1-0:1.0 -> ../../../devices/platform/soc@0/a8f8800.usb/a800000.usb/xhci-hcd.0.auto/usb1/1-0:1.0
    lrwxrwxrwx 1 root root 0 Feb 27 00:00 2-0:1.0 -> ../../../devices/platform/soc@0/a8f8800.usb/a800000.usb/xhci-hcd.0.auto/usb2/2-0:1.0
    lrwxrwxrwx 1 root root 0 Feb 27 00:00 3-0:1.0 -> ../../../devices/platform/soc@0/a4f8800.usb/a400000.usb/xhci-hcd.1.auto/usb3/3-0:1.0
    lrwxrwxrwx 1 root root 0 Feb 27 00:00 usb1 -> ../../../devices/platform/soc@0/a8f8800.usb/a800000.usb/xhci-hcd.0.auto/usb1
    lrwxrwxrwx 1 root root 0 Feb 27 00:00 usb2 -> ../../../devices/platform/soc@0/a8f8800.usb/a800000.usb/xhci-hcd.0.auto/usb2
    lrwxrwxrwx 1 root root 0 Feb 27 00:00 usb3 -> ../../../devices/platform/soc@0/a4f8800.usb/a400000.usb/xhci-hcd.1.auto/usb3

Have you also encountered this?

Best,

Adrien

Re: [PATCH v1 0/6] arm64: qcom: sa8775p: add support for USB

[Dmitry Baryshkov]

On Tue, 25 Apr 2023 at 01:36, Adrien Thierry <athierry@redhat.com> wrote:
>
> Hi Shazad,
>
> On Fri, Apr 21, 2023 at 07:09:15PM +0530, Shazad Hussain wrote:
> > Update relavent DT bindings for USB, add new config to the phy driver,
> > add USB and PHY nodes to the .dtsi and enable them in the board .dts
> > for the sa8775p-ride platform.
> >
> > Shazad Hussain (6):
> >   dt-bindings: usb: qcom,dwc3: Add bindings for SA8775P
> >   dt-bindings: phy: qcom,usb-snps-femto-v2: Add bindings for SA8775P
> >   dt-bindings: phy: qcom,sc8280xp-qmp-usb3-uni: Add SA8775P USB PHY
> >     binding
> >   phy: qcom-qmp: Add SA8775P USB3 UNI phy
> >   arm64: dts: qcom: sa8775p: add USB nodes
> >   arm64: dts: qcom: sa8775p-ride: enable USB nodes
> >
> >  .../phy/qcom,sc8280xp-qmp-usb3-uni-phy.yaml   |   1 +
> >  .../bindings/phy/qcom,usb-snps-femto-v2.yaml  |   1 +
> >  .../devicetree/bindings/usb/qcom,dwc3.yaml    |   5 +
> >  arch/arm64/boot/dts/qcom/sa8775p-ride.dts     |  92 +++++++
> >  arch/arm64/boot/dts/qcom/sa8775p.dtsi         | 239 +++++++++++++++++-
> >  drivers/phy/qualcomm/phy-qcom-qmp-usb.c       |  45 ++++
> >  6 files changed, 381 insertions(+), 2 deletions(-)
> >
> > --
> > 2.17.1
> >
>
> Thanks for posting this. I tested the series on the sa8775p, and it seems
> initialization for the controller at a400000 sometimes fails with a
> timeout (-110) error:
>
>     dwc3 a400000.usb: Adding to iommu group 2
>     xhci-hcd xhci-hcd.0.auto: xHCI Host Controller
>     xhci-hcd xhci-hcd.0.auto: new USB bus registered, assigned bus number 1
>     xhci-hcd xhci-hcd.0.auto: can't setup: -110
>     xhci-hcd xhci-hcd.0.auto: USB bus 1 deregistered
>     xhci-hcd: probe of xhci-hcd.0.auto failed with error -110

Semi-random suggestion, but could you please try using
clk_regmap_phy_mux/clk_regmap_phy_mux_ops for USB pipe clk src?


>     dwc3 a600000.usb: Adding to iommu group 3
>     dwc3 a800000.usb: Adding to iommu group 4
>     xhci-hcd xhci-hcd.1.auto: xHCI Host Controller
>     xhci-hcd xhci-hcd.1.auto: new USB bus registered, assigned bus number 1
>     xhci-hcd xhci-hcd.1.auto: hcc params 0x0110ffc5 hci version 0x110 quirks 0x0000000000010010
>     xhci-hcd xhci-hcd.1.auto: irq 162, io mem 0x0a800000
>     xhci-hcd xhci-hcd.1.auto: xHCI Host Controller
>     xhci-hcd xhci-hcd.1.auto: new USB bus registered, assigned bus number 2
>     xhci-hcd xhci-hcd.1.auto: Host supports USB 3.1 Enhanced SuperSpeed
>     hub 1-0:1.0: USB hub found
>     hub 1-0:1.0: 1 port detected
>     usb usb2: We don't know the algorithms for LPM for this host, disabling LPM.
>     hub 2-0:1.0: USB hub found
>     hub 2-0:1.0: 1 port detected
>
> In this case, only usb devices for a800000 are showing:
>
>     dracut:/# ls -alh /sys/bus/usb/devices
>     total 0
>     drwxr-xr-x 2 root root 0 Feb 27 00:00 .
>     drwxr-xr-x 4 root root 0 Feb 27 00:00 ..
>     lrwxrwxrwx 1 root root 0 Feb 27 00:00 1-0:1.0 -> ../../../devices/platform/soc@0/a8f8800.usb/a800000.usb/xhci-hcd.1.auto/usb1/1-0:1.0
>     lrwxrwxrwx 1 root root 0 Feb 27 00:00 2-0:1.0 -> ../../../devices/platform/soc@0/a8f8800.usb/a800000.usb/xhci-hcd.1.auto/usb2/2-0:1.0
>     lrwxrwxrwx 1 root root 0 Feb 27 00:00 usb1 -> ../../../devices/platform/soc@0/a8f8800.usb/a800000.usb/xhci-hcd.1.auto/usb1
>     lrwxrwxrwx 1 root root 0 Feb 27 00:00 usb2 -> ../../../devices/platform/soc@0/a8f8800.usb/a800000.usb/xhci-hcd.1.auto/usb2
>
> This happens approximately 1 out of 2 reboots. Here's the kernel output
> when initialization succeeds:
>
>     dwc3 a600000.usb: Adding to iommu group 2
>     dwc3 a800000.usb: Adding to iommu group 3
>     xhci-hcd xhci-hcd.0.auto: xHCI Host Controller
>     xhci-hcd xhci-hcd.0.auto: new USB bus registered, assigned bus number 1
>     xhci-hcd xhci-hcd.0.auto: hcc params 0x0110ffc5 hci version 0x110 quirks 0x0000000000010010
>     xhci-hcd xhci-hcd.0.auto: irq 161, io mem 0x0a800000
>     xhci-hcd xhci-hcd.0.auto: xHCI Host Controller
>     xhci-hcd xhci-hcd.0.auto: new USB bus registered, assigned bus number 2
>     xhci-hcd xhci-hcd.0.auto: Host supports USB 3.1 Enhanced SuperSpeed
>     hub 1-0:1.0: USB hub found
>     hub 1-0:1.0: 1 port detected
>     usb usb2: We don't know the algorithms for LPM for this host, disabling LPM.
>     hub 2-0:1.0: USB hub found
>     hub 2-0:1.0: 1 port detected
>     dwc3 a400000.usb: Adding to iommu group 4
>     xhci-hcd xhci-hcd.1.auto: xHCI Host Controller
>     xhci-hcd xhci-hcd.1.auto: new USB bus registered, assigned bus number 3
>     xhci-hcd xhci-hcd.1.auto: USB3 root hub has no ports
>     xhci-hcd xhci-hcd.1.auto: hcc params 0x0220fe65 hci version 0x110 quirks 0x0000000000010010
>     xhci-hcd xhci-hcd.1.auto: irq 162, io mem 0x0a400000
>     hub 3-0:1.0: USB hub found
>     hub 3-0:1.0: 1 port detected
>
> And the list of usb devices:
>
>     dracut:/# ls -alh /sys/bus/usb/devices
>     total 0
>     drwxr-xr-x 2 root root 0 Feb 27 00:00 .
>     drwxr-xr-x 4 root root 0 Feb 27 00:00 ..
>     lrwxrwxrwx 1 root root 0 Feb 27 00:00 1-0:1.0 -> ../../../devices/platform/soc@0/a8f8800.usb/a800000.usb/xhci-hcd.0.auto/usb1/1-0:1.0
>     lrwxrwxrwx 1 root root 0 Feb 27 00:00 2-0:1.0 -> ../../../devices/platform/soc@0/a8f8800.usb/a800000.usb/xhci-hcd.0.auto/usb2/2-0:1.0
>     lrwxrwxrwx 1 root root 0 Feb 27 00:00 3-0:1.0 -> ../../../devices/platform/soc@0/a4f8800.usb/a400000.usb/xhci-hcd.1.auto/usb3/3-0:1.0
>     lrwxrwxrwx 1 root root 0 Feb 27 00:00 usb1 -> ../../../devices/platform/soc@0/a8f8800.usb/a800000.usb/xhci-hcd.0.auto/usb1
>     lrwxrwxrwx 1 root root 0 Feb 27 00:00 usb2 -> ../../../devices/platform/soc@0/a8f8800.usb/a800000.usb/xhci-hcd.0.auto/usb2
>     lrwxrwxrwx 1 root root 0 Feb 27 00:00 usb3 -> ../../../devices/platform/soc@0/a4f8800.usb/a400000.usb/xhci-hcd.1.auto/usb3
>
> Have you also encountered this?
>
> Best,
>
> Adrien
>


-- 
With best wishes
Dmitry

Re: [PATCH v1 0/6] arm64: qcom: sa8775p: add support for USB

[Adrien Thierry]

Hi Dmitry,

> Semi-random suggestion, but could you please try using
> clk_regmap_phy_mux/clk_regmap_phy_mux_ops for USB pipe clk src?

Which specific clock are you refering to? I'm not very familiar with
those, in the device tree I'm seeing "pipe" clocks for usb_0 and usb_1
phys, but not for usb_2, which is the one that's causing issues.

Best,

Adrien

Re: [PATCH v1 0/6] arm64: qcom: sa8775p: add support for USB

[Shazad Hussain]

Hi Adrien,

On 4/25/2023 4:05 AM, Adrien Thierry wrote:
> Hi Shazad,
> 
> On Fri, Apr 21, 2023 at 07:09:15PM +0530, Shazad Hussain wrote:
>> Update relavent DT bindings for USB, add new config to the phy driver,
>> add USB and PHY nodes to the .dtsi and enable them in the board .dts
>> for the sa8775p-ride platform.
>>
>> Shazad Hussain (6):
>>    dt-bindings: usb: qcom,dwc3: Add bindings for SA8775P
>>    dt-bindings: phy: qcom,usb-snps-femto-v2: Add bindings for SA8775P
>>    dt-bindings: phy: qcom,sc8280xp-qmp-usb3-uni: Add SA8775P USB PHY
>>      binding
>>    phy: qcom-qmp: Add SA8775P USB3 UNI phy
>>    arm64: dts: qcom: sa8775p: add USB nodes
>>    arm64: dts: qcom: sa8775p-ride: enable USB nodes
>>
>>   .../phy/qcom,sc8280xp-qmp-usb3-uni-phy.yaml   |   1 +
>>   .../bindings/phy/qcom,usb-snps-femto-v2.yaml  |   1 +
>>   .../devicetree/bindings/usb/qcom,dwc3.yaml    |   5 +
>>   arch/arm64/boot/dts/qcom/sa8775p-ride.dts     |  92 +++++++
>>   arch/arm64/boot/dts/qcom/sa8775p.dtsi         | 239 +++++++++++++++++-
>>   drivers/phy/qualcomm/phy-qcom-qmp-usb.c       |  45 ++++
>>   6 files changed, 381 insertions(+), 2 deletions(-)
>>
>> -- 
>> 2.17.1
>>
> 
> Thanks for posting this. I tested the series on the sa8775p, and it seems
> initialization for the controller at a400000 sometimes fails with a
> timeout (-110) error:
> 
>      dwc3 a400000.usb: Adding to iommu group 2
>      xhci-hcd xhci-hcd.0.auto: xHCI Host Controller
>      xhci-hcd xhci-hcd.0.auto: new USB bus registered, assigned bus number 1
>      xhci-hcd xhci-hcd.0.auto: can't setup: -110
>      xhci-hcd xhci-hcd.0.auto: USB bus 1 deregistered
>      xhci-hcd: probe of xhci-hcd.0.auto failed with error -110
>      dwc3 a600000.usb: Adding to iommu group 3
>      dwc3 a800000.usb: Adding to iommu group 4
>      xhci-hcd xhci-hcd.1.auto: xHCI Host Controller
>      xhci-hcd xhci-hcd.1.auto: new USB bus registered, assigned bus number 1
>      xhci-hcd xhci-hcd.1.auto: hcc params 0x0110ffc5 hci version 0x110 quirks 0x0000000000010010
>      xhci-hcd xhci-hcd.1.auto: irq 162, io mem 0x0a800000
>      xhci-hcd xhci-hcd.1.auto: xHCI Host Controller
>      xhci-hcd xhci-hcd.1.auto: new USB bus registered, assigned bus number 2
>      xhci-hcd xhci-hcd.1.auto: Host supports USB 3.1 Enhanced SuperSpeed
>      hub 1-0:1.0: USB hub found
>      hub 1-0:1.0: 1 port detected
>      usb usb2: We don't know the algorithms for LPM for this host, disabling LPM.
>      hub 2-0:1.0: USB hub found
>      hub 2-0:1.0: 1 port detected
> 
> In this case, only usb devices for a800000 are showing:
> 
>      dracut:/# ls -alh /sys/bus/usb/devices
>      total 0
>      drwxr-xr-x 2 root root 0 Feb 27 00:00 .
>      drwxr-xr-x 4 root root 0 Feb 27 00:00 ..
>      lrwxrwxrwx 1 root root 0 Feb 27 00:00 1-0:1.0 -> ../../../devices/platform/soc@0/a8f8800.usb/a800000.usb/xhci-hcd.1.auto/usb1/1-0:1.0
>      lrwxrwxrwx 1 root root 0 Feb 27 00:00 2-0:1.0 -> ../../../devices/platform/soc@0/a8f8800.usb/a800000.usb/xhci-hcd.1.auto/usb2/2-0:1.0
>      lrwxrwxrwx 1 root root 0 Feb 27 00:00 usb1 -> ../../../devices/platform/soc@0/a8f8800.usb/a800000.usb/xhci-hcd.1.auto/usb1
>      lrwxrwxrwx 1 root root 0 Feb 27 00:00 usb2 -> ../../../devices/platform/soc@0/a8f8800.usb/a800000.usb/xhci-hcd.1.auto/usb2
> 
> This happens approximately 1 out of 2 reboots. Here's the kernel output
> when initialization succeeds:
> 
>      dwc3 a600000.usb: Adding to iommu group 2
>      dwc3 a800000.usb: Adding to iommu group 3
>      xhci-hcd xhci-hcd.0.auto: xHCI Host Controller
>      xhci-hcd xhci-hcd.0.auto: new USB bus registered, assigned bus number 1
>      xhci-hcd xhci-hcd.0.auto: hcc params 0x0110ffc5 hci version 0x110 quirks 0x0000000000010010
>      xhci-hcd xhci-hcd.0.auto: irq 161, io mem 0x0a800000
>      xhci-hcd xhci-hcd.0.auto: xHCI Host Controller
>      xhci-hcd xhci-hcd.0.auto: new USB bus registered, assigned bus number 2
>      xhci-hcd xhci-hcd.0.auto: Host supports USB 3.1 Enhanced SuperSpeed
>      hub 1-0:1.0: USB hub found
>      hub 1-0:1.0: 1 port detected
>      usb usb2: We don't know the algorithms for LPM for this host, disabling LPM.
>      hub 2-0:1.0: USB hub found
>      hub 2-0:1.0: 1 port detected
>      dwc3 a400000.usb: Adding to iommu group 4
>      xhci-hcd xhci-hcd.1.auto: xHCI Host Controller
>      xhci-hcd xhci-hcd.1.auto: new USB bus registered, assigned bus number 3
>      xhci-hcd xhci-hcd.1.auto: USB3 root hub has no ports
>      xhci-hcd xhci-hcd.1.auto: hcc params 0x0220fe65 hci version 0x110 quirks 0x0000000000010010
>      xhci-hcd xhci-hcd.1.auto: irq 162, io mem 0x0a400000
>      hub 3-0:1.0: USB hub found
>      hub 3-0:1.0: 1 port detected
> 
> And the list of usb devices:
> 
>      dracut:/# ls -alh /sys/bus/usb/devices
>      total 0
>      drwxr-xr-x 2 root root 0 Feb 27 00:00 .
>      drwxr-xr-x 4 root root 0 Feb 27 00:00 ..
>      lrwxrwxrwx 1 root root 0 Feb 27 00:00 1-0:1.0 -> ../../../devices/platform/soc@0/a8f8800.usb/a800000.usb/xhci-hcd.0.auto/usb1/1-0:1.0
>      lrwxrwxrwx 1 root root 0 Feb 27 00:00 2-0:1.0 -> ../../../devices/platform/soc@0/a8f8800.usb/a800000.usb/xhci-hcd.0.auto/usb2/2-0:1.0
>      lrwxrwxrwx 1 root root 0 Feb 27 00:00 3-0:1.0 -> ../../../devices/platform/soc@0/a4f8800.usb/a400000.usb/xhci-hcd.1.auto/usb3/3-0:1.0
>      lrwxrwxrwx 1 root root 0 Feb 27 00:00 usb1 -> ../../../devices/platform/soc@0/a8f8800.usb/a800000.usb/xhci-hcd.0.auto/usb1
>      lrwxrwxrwx 1 root root 0 Feb 27 00:00 usb2 -> ../../../devices/platform/soc@0/a8f8800.usb/a800000.usb/xhci-hcd.0.auto/usb2
>      lrwxrwxrwx 1 root root 0 Feb 27 00:00 usb3 -> ../../../devices/platform/soc@0/a4f8800.usb/a400000.usb/xhci-hcd.1.auto/usb3
> 
> Have you also encountered this?
> 

I did try 10 reboots and did not encounter this issue on my setup tough.

> Best,
> 
> Adrien
> 

---
-Shazad

Re: [PATCH v1 0/6] arm64: qcom: sa8775p: add support for USB

[Konrad Dybcio]

On 4/24/23 23:35, Adrien Thierry wrote:
> Hi Shazad,
>
> On Fri, Apr 21, 2023 at 07:09:15PM +0530, Shazad Hussain wrote:
>> Update relavent DT bindings for USB, add new config to the phy driver,
>> add USB and PHY nodes to the .dtsi and enable them in the board .dts
>> for the sa8775p-ride platform.
>>
>> Shazad Hussain (6):
>>    dt-bindings: usb: qcom,dwc3: Add bindings for SA8775P
>>    dt-bindings: phy: qcom,usb-snps-femto-v2: Add bindings for SA8775P
>>    dt-bindings: phy: qcom,sc8280xp-qmp-usb3-uni: Add SA8775P USB PHY
>>      binding
>>    phy: qcom-qmp: Add SA8775P USB3 UNI phy
>>    arm64: dts: qcom: sa8775p: add USB nodes
>>    arm64: dts: qcom: sa8775p-ride: enable USB nodes
>>
>>   .../phy/qcom,sc8280xp-qmp-usb3-uni-phy.yaml   |   1 +
>>   .../bindings/phy/qcom,usb-snps-femto-v2.yaml  |   1 +
>>   .../devicetree/bindings/usb/qcom,dwc3.yaml    |   5 +
>>   arch/arm64/boot/dts/qcom/sa8775p-ride.dts     |  92 +++++++
>>   arch/arm64/boot/dts/qcom/sa8775p.dtsi         | 239 +++++++++++++++++-
>>   drivers/phy/qualcomm/phy-qcom-qmp-usb.c       |  45 ++++
>>   6 files changed, 381 insertions(+), 2 deletions(-)
>>
>> -- 
>> 2.17.1
>>
> Thanks for posting this. I tested the series on the sa8775p, and it seems
> initialization for the controller at a400000 sometimes fails with a
> timeout (-110) error:
>
>      dwc3 a400000.usb: Adding to iommu group 2
>      xhci-hcd xhci-hcd.0.auto: xHCI Host Controller
>      xhci-hcd xhci-hcd.0.auto: new USB bus registered, assigned bus number 1
>      xhci-hcd xhci-hcd.0.auto: can't setup: -110
>      xhci-hcd xhci-hcd.0.auto: USB bus 1 deregistered
>      xhci-hcd: probe of xhci-hcd.0.auto failed with error -110
>      dwc3 a600000.usb: Adding to iommu group 3
>      dwc3 a800000.usb: Adding to iommu group 4
>      xhci-hcd xhci-hcd.1.auto: xHCI Host Controller
>      xhci-hcd xhci-hcd.1.auto: new USB bus registered, assigned bus number 1
>      xhci-hcd xhci-hcd.1.auto: hcc params 0x0110ffc5 hci version 0x110 quirks 0x0000000000010010
>      xhci-hcd xhci-hcd.1.auto: irq 162, io mem 0x0a800000
>      xhci-hcd xhci-hcd.1.auto: xHCI Host Controller
>      xhci-hcd xhci-hcd.1.auto: new USB bus registered, assigned bus number 2
>      xhci-hcd xhci-hcd.1.auto: Host supports USB 3.1 Enhanced SuperSpeed
>      hub 1-0:1.0: USB hub found
>      hub 1-0:1.0: 1 port detected
>      usb usb2: We don't know the algorithms for LPM for this host, disabling LPM.
>      hub 2-0:1.0: USB hub found
>      hub 2-0:1.0: 1 port detected
>
> In this case, only usb devices for a800000 are showing:
>
>      dracut:/# ls -alh /sys/bus/usb/devices
>      total 0
>      drwxr-xr-x 2 root root 0 Feb 27 00:00 .
>      drwxr-xr-x 4 root root 0 Feb 27 00:00 ..
>      lrwxrwxrwx 1 root root 0 Feb 27 00:00 1-0:1.0 -> ../../../devices/platform/soc@0/a8f8800.usb/a800000.usb/xhci-hcd.1.auto/usb1/1-0:1.0
>      lrwxrwxrwx 1 root root 0 Feb 27 00:00 2-0:1.0 -> ../../../devices/platform/soc@0/a8f8800.usb/a800000.usb/xhci-hcd.1.auto/usb2/2-0:1.0
>      lrwxrwxrwx 1 root root 0 Feb 27 00:00 usb1 -> ../../../devices/platform/soc@0/a8f8800.usb/a800000.usb/xhci-hcd.1.auto/usb1
>      lrwxrwxrwx 1 root root 0 Feb 27 00:00 usb2 -> ../../../devices/platform/soc@0/a8f8800.usb/a800000.usb/xhci-hcd.1.auto/usb2
>
> This happens approximately 1 out of 2 reboots. Here's the kernel output
> when initialization succeeds:
>
>      dwc3 a600000.usb: Adding to iommu group 2
>      dwc3 a800000.usb: Adding to iommu group 3
>      xhci-hcd xhci-hcd.0.auto: xHCI Host Controller
>      xhci-hcd xhci-hcd.0.auto: new USB bus registered, assigned bus number 1
>      xhci-hcd xhci-hcd.0.auto: hcc params 0x0110ffc5 hci version 0x110 quirks 0x0000000000010010
>      xhci-hcd xhci-hcd.0.auto: irq 161, io mem 0x0a800000
>      xhci-hcd xhci-hcd.0.auto: xHCI Host Controller
>      xhci-hcd xhci-hcd.0.auto: new USB bus registered, assigned bus number 2
>      xhci-hcd xhci-hcd.0.auto: Host supports USB 3.1 Enhanced SuperSpeed
>      hub 1-0:1.0: USB hub found
>      hub 1-0:1.0: 1 port detected
>      usb usb2: We don't know the algorithms for LPM for this host, disabling LPM.
>      hub 2-0:1.0: USB hub found
>      hub 2-0:1.0: 1 port detected
>      dwc3 a400000.usb: Adding to iommu group 4
>      xhci-hcd xhci-hcd.1.auto: xHCI Host Controller
>      xhci-hcd xhci-hcd.1.auto: new USB bus registered, assigned bus number 3
>      xhci-hcd xhci-hcd.1.auto: USB3 root hub has no ports
>      xhci-hcd xhci-hcd.1.auto: hcc params 0x0220fe65 hci version 0x110 quirks 0x0000000000010010
>      xhci-hcd xhci-hcd.1.auto: irq 162, io mem 0x0a400000
>      hub 3-0:1.0: USB hub found
>      hub 3-0:1.0: 1 port detected
>
> And the list of usb devices:
>
>      dracut:/# ls -alh /sys/bus/usb/devices
>      total 0
>      drwxr-xr-x 2 root root 0 Feb 27 00:00 .
>      drwxr-xr-x 4 root root 0 Feb 27 00:00 ..
>      lrwxrwxrwx 1 root root 0 Feb 27 00:00 1-0:1.0 -> ../../../devices/platform/soc@0/a8f8800.usb/a800000.usb/xhci-hcd.0.auto/usb1/1-0:1.0
>      lrwxrwxrwx 1 root root 0 Feb 27 00:00 2-0:1.0 -> ../../../devices/platform/soc@0/a8f8800.usb/a800000.usb/xhci-hcd.0.auto/usb2/2-0:1.0
>      lrwxrwxrwx 1 root root 0 Feb 27 00:00 3-0:1.0 -> ../../../devices/platform/soc@0/a4f8800.usb/a400000.usb/xhci-hcd.1.auto/usb3/3-0:1.0
>      lrwxrwxrwx 1 root root 0 Feb 27 00:00 usb1 -> ../../../devices/platform/soc@0/a8f8800.usb/a800000.usb/xhci-hcd.0.auto/usb1
>      lrwxrwxrwx 1 root root 0 Feb 27 00:00 usb2 -> ../../../devices/platform/soc@0/a8f8800.usb/a800000.usb/xhci-hcd.0.auto/usb2
>      lrwxrwxrwx 1 root root 0 Feb 27 00:00 usb3 -> ../../../devices/platform/soc@0/a4f8800.usb/a400000.usb/xhci-hcd.1.auto/usb3
>
> Have you also encountered this?

I've had some issues with QMPPHY not (sometimes?) probing in time on SM6115 only when built as a module.. perhaps it'd be worth checking out of it works fine with =y?


Konrad

>
> Best,
>
> Adrien
>

Re: [PATCH v1 0/6] arm64: qcom: sa8775p: add support for USB

[Shazad Hussain]

On 4/27/2023 5:12 AM, Konrad Dybcio wrote:
> 
> On 4/24/23 23:35, Adrien Thierry wrote:
>> Hi Shazad,
>>
>> On Fri, Apr 21, 2023 at 07:09:15PM +0530, Shazad Hussain wrote:
>>> Update relavent DT bindings for USB, add new config to the phy driver,
>>> add USB and PHY nodes to the .dtsi and enable them in the board .dts
>>> for the sa8775p-ride platform.
>>>
>>> Shazad Hussain (6):
>>>    dt-bindings: usb: qcom,dwc3: Add bindings for SA8775P
>>>    dt-bindings: phy: qcom,usb-snps-femto-v2: Add bindings for SA8775P
>>>    dt-bindings: phy: qcom,sc8280xp-qmp-usb3-uni: Add SA8775P USB PHY
>>>      binding
>>>    phy: qcom-qmp: Add SA8775P USB3 UNI phy
>>>    arm64: dts: qcom: sa8775p: add USB nodes
>>>    arm64: dts: qcom: sa8775p-ride: enable USB nodes
>>>
>>>   .../phy/qcom,sc8280xp-qmp-usb3-uni-phy.yaml   |   1 +
>>>   .../bindings/phy/qcom,usb-snps-femto-v2.yaml  |   1 +
>>>   .../devicetree/bindings/usb/qcom,dwc3.yaml    |   5 +
>>>   arch/arm64/boot/dts/qcom/sa8775p-ride.dts     |  92 +++++++
>>>   arch/arm64/boot/dts/qcom/sa8775p.dtsi         | 239 +++++++++++++++++-
>>>   drivers/phy/qualcomm/phy-qcom-qmp-usb.c       |  45 ++++
>>>   6 files changed, 381 insertions(+), 2 deletions(-)
>>>
>>> -- 
>>> 2.17.1
>>>
>> Thanks for posting this. I tested the series on the sa8775p, and it seems
>> initialization for the controller at a400000 sometimes fails with a
>> timeout (-110) error:
>>
>>      dwc3 a400000.usb: Adding to iommu group 2
>>      xhci-hcd xhci-hcd.0.auto: xHCI Host Controller
>>      xhci-hcd xhci-hcd.0.auto: new USB bus registered, assigned bus 
>> number 1
>>      xhci-hcd xhci-hcd.0.auto: can't setup: -110
>>      xhci-hcd xhci-hcd.0.auto: USB bus 1 deregistered
>>      xhci-hcd: probe of xhci-hcd.0.auto failed with error -110
>>      dwc3 a600000.usb: Adding to iommu group 3
>>      dwc3 a800000.usb: Adding to iommu group 4
>>      xhci-hcd xhci-hcd.1.auto: xHCI Host Controller
>>      xhci-hcd xhci-hcd.1.auto: new USB bus registered, assigned bus 
>> number 1
>>      xhci-hcd xhci-hcd.1.auto: hcc params 0x0110ffc5 hci version 0x110 
>> quirks 0x0000000000010010
>>      xhci-hcd xhci-hcd.1.auto: irq 162, io mem 0x0a800000
>>      xhci-hcd xhci-hcd.1.auto: xHCI Host Controller
>>      xhci-hcd xhci-hcd.1.auto: new USB bus registered, assigned bus 
>> number 2
>>      xhci-hcd xhci-hcd.1.auto: Host supports USB 3.1 Enhanced SuperSpeed
>>      hub 1-0:1.0: USB hub found
>>      hub 1-0:1.0: 1 port detected
>>      usb usb2: We don't know the algorithms for LPM for this host, 
>> disabling LPM.
>>      hub 2-0:1.0: USB hub found
>>      hub 2-0:1.0: 1 port detected
>>
>> In this case, only usb devices for a800000 are showing:
>>
>>      dracut:/# ls -alh /sys/bus/usb/devices
>>      total 0
>>      drwxr-xr-x 2 root root 0 Feb 27 00:00 .
>>      drwxr-xr-x 4 root root 0 Feb 27 00:00 ..
>>      lrwxrwxrwx 1 root root 0 Feb 27 00:00 1-0:1.0 -> 
>> ../../../devices/platform/soc@0/a8f8800.usb/a800000.usb/xhci-hcd.1.auto/usb1/1-0:1.0
>>      lrwxrwxrwx 1 root root 0 Feb 27 00:00 2-0:1.0 -> 
>> ../../../devices/platform/soc@0/a8f8800.usb/a800000.usb/xhci-hcd.1.auto/usb2/2-0:1.0
>>      lrwxrwxrwx 1 root root 0 Feb 27 00:00 usb1 -> 
>> ../../../devices/platform/soc@0/a8f8800.usb/a800000.usb/xhci-hcd.1.auto/usb1
>>      lrwxrwxrwx 1 root root 0 Feb 27 00:00 usb2 -> 
>> ../../../devices/platform/soc@0/a8f8800.usb/a800000.usb/xhci-hcd.1.auto/usb2
>>
>> This happens approximately 1 out of 2 reboots. Here's the kernel output
>> when initialization succeeds:
>>
>>      dwc3 a600000.usb: Adding to iommu group 2
>>      dwc3 a800000.usb: Adding to iommu group 3
>>      xhci-hcd xhci-hcd.0.auto: xHCI Host Controller
>>      xhci-hcd xhci-hcd.0.auto: new USB bus registered, assigned bus 
>> number 1
>>      xhci-hcd xhci-hcd.0.auto: hcc params 0x0110ffc5 hci version 0x110 
>> quirks 0x0000000000010010
>>      xhci-hcd xhci-hcd.0.auto: irq 161, io mem 0x0a800000
>>      xhci-hcd xhci-hcd.0.auto: xHCI Host Controller
>>      xhci-hcd xhci-hcd.0.auto: new USB bus registered, assigned bus 
>> number 2
>>      xhci-hcd xhci-hcd.0.auto: Host supports USB 3.1 Enhanced SuperSpeed
>>      hub 1-0:1.0: USB hub found
>>      hub 1-0:1.0: 1 port detected
>>      usb usb2: We don't know the algorithms for LPM for this host, 
>> disabling LPM.
>>      hub 2-0:1.0: USB hub found
>>      hub 2-0:1.0: 1 port detected
>>      dwc3 a400000.usb: Adding to iommu group 4
>>      xhci-hcd xhci-hcd.1.auto: xHCI Host Controller
>>      xhci-hcd xhci-hcd.1.auto: new USB bus registered, assigned bus 
>> number 3
>>      xhci-hcd xhci-hcd.1.auto: USB3 root hub has no ports
>>      xhci-hcd xhci-hcd.1.auto: hcc params 0x0220fe65 hci version 0x110 
>> quirks 0x0000000000010010
>>      xhci-hcd xhci-hcd.1.auto: irq 162, io mem 0x0a400000
>>      hub 3-0:1.0: USB hub found
>>      hub 3-0:1.0: 1 port detected
>>
>> And the list of usb devices:
>>
>>      dracut:/# ls -alh /sys/bus/usb/devices
>>      total 0
>>      drwxr-xr-x 2 root root 0 Feb 27 00:00 .
>>      drwxr-xr-x 4 root root 0 Feb 27 00:00 ..
>>      lrwxrwxrwx 1 root root 0 Feb 27 00:00 1-0:1.0 -> 
>> ../../../devices/platform/soc@0/a8f8800.usb/a800000.usb/xhci-hcd.0.auto/usb1/1-0:1.0
>>      lrwxrwxrwx 1 root root 0 Feb 27 00:00 2-0:1.0 -> 
>> ../../../devices/platform/soc@0/a8f8800.usb/a800000.usb/xhci-hcd.0.auto/usb2/2-0:1.0
>>      lrwxrwxrwx 1 root root 0 Feb 27 00:00 3-0:1.0 -> 
>> ../../../devices/platform/soc@0/a4f8800.usb/a400000.usb/xhci-hcd.1.auto/usb3/3-0:1.0
>>      lrwxrwxrwx 1 root root 0 Feb 27 00:00 usb1 -> 
>> ../../../devices/platform/soc@0/a8f8800.usb/a800000.usb/xhci-hcd.0.auto/usb1
>>      lrwxrwxrwx 1 root root 0 Feb 27 00:00 usb2 -> 
>> ../../../devices/platform/soc@0/a8f8800.usb/a800000.usb/xhci-hcd.0.auto/usb2
>>      lrwxrwxrwx 1 root root 0 Feb 27 00:00 usb3 -> 
>> ../../../devices/platform/soc@0/a4f8800.usb/a400000.usb/xhci-hcd.1.auto/usb3
>>
>> Have you also encountered this?
> 
> I've had some issues with QMPPHY not (sometimes?) probing in time on 
> SM6115 only when built as a module.. perhaps it'd be worth checking out 
> of it works fine with =y?
> 

In my setup I tried keeping QMPPHY as =y only and did not see the issue

with 10 reboots.
> 
> Konrad
> 
>>
>> Best,
>>
>> Adrien
>>
---
Shazad

Re: [PATCH v1 1/6] dt-bindings: usb: qcom,dwc3: Add bindings for SA8775P

[Rob Herring]

On Fri, Apr 21, 2023 at 07:09:16PM +0530, Shazad Hussain wrote:
> Add the compatible string for SA8775P SoC from Qualcomm.
> 
> Set minItems to 3 for interrupts as usb2 i.e third usb port supports
> only high speed mode and does not require ss_phy_irq.
> 
> Signed-off-by: Shazad Hussain <quic_shazhuss@quicinc.com>
> ---
>  Documentation/devicetree/bindings/usb/qcom,dwc3.yaml | 5 +++++
>  1 file changed, 5 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml b/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml
> index d84281926f10..3ae02cffae49 100644
> --- a/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml
> +++ b/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml
> @@ -23,6 +23,7 @@ properties:
>            - qcom,msm8998-dwc3
>            - qcom,qcm2290-dwc3
>            - qcom,qcs404-dwc3
> +          - qcom,sa8775p-dwc3
>            - qcom,sc7180-dwc3
>            - qcom,sc7280-dwc3
>            - qcom,sc8280xp-dwc3
> @@ -180,6 +181,7 @@ allOf:
>                - qcom,msm8953-dwc3
>                - qcom,msm8996-dwc3
>                - qcom,msm8998-dwc3
> +              - qcom,sa8775p-dwc3
>                - qcom,sc7180-dwc3
>                - qcom,sc7280-dwc3
>                - qcom,sdm670-dwc3
> @@ -443,12 +445,15 @@ allOf:
>          compatible:
>            contains:
>              enum:
> +              - qcom,sa8775p-dwc3
>                - qcom,sc8280xp-dwc3
>      then:
>        properties:
>          interrupts:
> +          minItems: 3

Now 3 interrupts is valid for qcom,sc8280xp-dwc3?

>            maxItems: 4
>          interrupt-names:
> +          minItems: 3
>            items:
>              - const: pwr_event
>              - const: dp_hs_phy_irq
> -- 
> 2.17.1
> 

Re: [PATCH v1 2/6] dt-bindings: phy: qcom,usb-snps-femto-v2: Add bindings for SA8775P

[Rob Herring]

On Fri, 21 Apr 2023 19:09:17 +0530, Shazad Hussain wrote:
> Document the compatible string for USB phy found in Qualcomm SA8775P SoC
> 
> Signed-off-by: Shazad Hussain <quic_shazhuss@quicinc.com>
> ---
>  .../devicetree/bindings/phy/qcom,usb-snps-femto-v2.yaml          | 1 +
>  1 file changed, 1 insertion(+)
> 

Acked-by: Rob Herring <robh@kernel.org>

Re: [PATCH v1 3/6] dt-bindings: phy: qcom,sc8280xp-qmp-usb3-uni: Add SA8775P USB PHY binding

[Rob Herring]

On Fri, 21 Apr 2023 19:09:18 +0530, Shazad Hussain wrote:
> Add compatible string for Qualcomm QMP Super Speed (SS) UNI PHY found
> in SA8775P.
> 
> Signed-off-by: Shazad Hussain <quic_shazhuss@quicinc.com>
> ---
>  .../devicetree/bindings/phy/qcom,sc8280xp-qmp-usb3-uni-phy.yaml  | 1 +
>  1 file changed, 1 insertion(+)
> 

Acked-by: Rob Herring <robh@kernel.org>

Re: [PATCH v1 1/6] dt-bindings: usb: qcom,dwc3: Add bindings for SA8775P

[Shazad Hussain]

On 4/27/2023 7:52 PM, Rob Herring wrote:
> On Fri, Apr 21, 2023 at 07:09:16PM +0530, Shazad Hussain wrote:
>> Add the compatible string for SA8775P SoC from Qualcomm.
>>
>> Set minItems to 3 for interrupts as usb2 i.e third usb port supports
>> only high speed mode and does not require ss_phy_irq.
>>
>> Signed-off-by: Shazad Hussain <quic_shazhuss@quicinc.com>
>> ---
>>   Documentation/devicetree/bindings/usb/qcom,dwc3.yaml | 5 +++++
>>   1 file changed, 5 insertions(+)
>>
>> diff --git a/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml b/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml
>> index d84281926f10..3ae02cffae49 100644
>> --- a/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml
>> +++ b/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml
>> @@ -23,6 +23,7 @@ properties:
>>             - qcom,msm8998-dwc3
>>             - qcom,qcm2290-dwc3
>>             - qcom,qcs404-dwc3
>> +          - qcom,sa8775p-dwc3
>>             - qcom,sc7180-dwc3
>>             - qcom,sc7280-dwc3
>>             - qcom,sc8280xp-dwc3
>> @@ -180,6 +181,7 @@ allOf:
>>                 - qcom,msm8953-dwc3
>>                 - qcom,msm8996-dwc3
>>                 - qcom,msm8998-dwc3
>> +              - qcom,sa8775p-dwc3
>>                 - qcom,sc7180-dwc3
>>                 - qcom,sc7280-dwc3
>>                 - qcom,sdm670-dwc3
>> @@ -443,12 +445,15 @@ allOf:
>>           compatible:
>>             contains:
>>               enum:
>> +              - qcom,sa8775p-dwc3
>>                 - qcom,sc8280xp-dwc3
>>       then:
>>         properties:
>>           interrupts:
>> +          minItems: 3
> 
> Now 3 interrupts is valid for qcom,sc8280xp-dwc3?
> 

Hi Rob,
I was under the impression from [1] that usb_2 for sc8280xp has only 3
irq's, but it seems it does required all 4 irq's.
I would take care of this in next version of the patch. Thanks for
pointing it out.

[1]:
https://lore.kernel.org/lkml/20230405125759.4201-7-quic_kriskura@quicinc.com/

>>             maxItems: 4
>>           interrupt-names:
>> +          minItems: 3
>>             items:
>>               - const: pwr_event
>>               - const: dp_hs_phy_irq
>> -- 
>> 2.17.1
>>
-Shazad

Re: [PATCH v1 0/6] arm64: qcom: sa8775p: add support for USB

[Adrien Thierry]

Hi Konrad,

On Thu, Apr 27, 2023 at 12:42:15AM +0100, Konrad Dybcio wrote:
> 
> On 4/24/23 23:35, Adrien Thierry wrote:
> > Hi Shazad,
> > 
> > On Fri, Apr 21, 2023 at 07:09:15PM +0530, Shazad Hussain wrote:
> > > Update relavent DT bindings for USB, add new config to the phy driver,
> > > add USB and PHY nodes to the .dtsi and enable them in the board .dts
> > > for the sa8775p-ride platform.
> > > 
> > > Shazad Hussain (6):
> > >    dt-bindings: usb: qcom,dwc3: Add bindings for SA8775P
> > >    dt-bindings: phy: qcom,usb-snps-femto-v2: Add bindings for SA8775P
> > >    dt-bindings: phy: qcom,sc8280xp-qmp-usb3-uni: Add SA8775P USB PHY
> > >      binding
> > >    phy: qcom-qmp: Add SA8775P USB3 UNI phy
> > >    arm64: dts: qcom: sa8775p: add USB nodes
> > >    arm64: dts: qcom: sa8775p-ride: enable USB nodes
> > > 
> > >   .../phy/qcom,sc8280xp-qmp-usb3-uni-phy.yaml   |   1 +
> > >   .../bindings/phy/qcom,usb-snps-femto-v2.yaml  |   1 +
> > >   .../devicetree/bindings/usb/qcom,dwc3.yaml    |   5 +
> > >   arch/arm64/boot/dts/qcom/sa8775p-ride.dts     |  92 +++++++
> > >   arch/arm64/boot/dts/qcom/sa8775p.dtsi         | 239 +++++++++++++++++-
> > >   drivers/phy/qualcomm/phy-qcom-qmp-usb.c       |  45 ++++
> > >   6 files changed, 381 insertions(+), 2 deletions(-)
> > > 
> > > -- 
> > > 2.17.1
> > > 
> > Thanks for posting this. I tested the series on the sa8775p, and it seems
> > initialization for the controller at a400000 sometimes fails with a
> > timeout (-110) error:
> > 
> >      dwc3 a400000.usb: Adding to iommu group 2
> >      xhci-hcd xhci-hcd.0.auto: xHCI Host Controller
> >      xhci-hcd xhci-hcd.0.auto: new USB bus registered, assigned bus number 1
> >      xhci-hcd xhci-hcd.0.auto: can't setup: -110
> >      xhci-hcd xhci-hcd.0.auto: USB bus 1 deregistered
> >      xhci-hcd: probe of xhci-hcd.0.auto failed with error -110
> >      dwc3 a600000.usb: Adding to iommu group 3
> >      dwc3 a800000.usb: Adding to iommu group 4
> >      xhci-hcd xhci-hcd.1.auto: xHCI Host Controller
> >      xhci-hcd xhci-hcd.1.auto: new USB bus registered, assigned bus number 1
> >      xhci-hcd xhci-hcd.1.auto: hcc params 0x0110ffc5 hci version 0x110 quirks 0x0000000000010010
> >      xhci-hcd xhci-hcd.1.auto: irq 162, io mem 0x0a800000
> >      xhci-hcd xhci-hcd.1.auto: xHCI Host Controller
> >      xhci-hcd xhci-hcd.1.auto: new USB bus registered, assigned bus number 2
> >      xhci-hcd xhci-hcd.1.auto: Host supports USB 3.1 Enhanced SuperSpeed
> >      hub 1-0:1.0: USB hub found
> >      hub 1-0:1.0: 1 port detected
> >      usb usb2: We don't know the algorithms for LPM for this host, disabling LPM.
> >      hub 2-0:1.0: USB hub found
> >      hub 2-0:1.0: 1 port detected
> > 
> > In this case, only usb devices for a800000 are showing:
> > 
> >      dracut:/# ls -alh /sys/bus/usb/devices
> >      total 0
> >      drwxr-xr-x 2 root root 0 Feb 27 00:00 .
> >      drwxr-xr-x 4 root root 0 Feb 27 00:00 ..
> >      lrwxrwxrwx 1 root root 0 Feb 27 00:00 1-0:1.0 -> ../../../devices/platform/soc@0/a8f8800.usb/a800000.usb/xhci-hcd.1.auto/usb1/1-0:1.0
> >      lrwxrwxrwx 1 root root 0 Feb 27 00:00 2-0:1.0 -> ../../../devices/platform/soc@0/a8f8800.usb/a800000.usb/xhci-hcd.1.auto/usb2/2-0:1.0
> >      lrwxrwxrwx 1 root root 0 Feb 27 00:00 usb1 -> ../../../devices/platform/soc@0/a8f8800.usb/a800000.usb/xhci-hcd.1.auto/usb1
> >      lrwxrwxrwx 1 root root 0 Feb 27 00:00 usb2 -> ../../../devices/platform/soc@0/a8f8800.usb/a800000.usb/xhci-hcd.1.auto/usb2
> > 
> > This happens approximately 1 out of 2 reboots. Here's the kernel output
> > when initialization succeeds:
> > 
> >      dwc3 a600000.usb: Adding to iommu group 2
> >      dwc3 a800000.usb: Adding to iommu group 3
> >      xhci-hcd xhci-hcd.0.auto: xHCI Host Controller
> >      xhci-hcd xhci-hcd.0.auto: new USB bus registered, assigned bus number 1
> >      xhci-hcd xhci-hcd.0.auto: hcc params 0x0110ffc5 hci version 0x110 quirks 0x0000000000010010
> >      xhci-hcd xhci-hcd.0.auto: irq 161, io mem 0x0a800000
> >      xhci-hcd xhci-hcd.0.auto: xHCI Host Controller
> >      xhci-hcd xhci-hcd.0.auto: new USB bus registered, assigned bus number 2
> >      xhci-hcd xhci-hcd.0.auto: Host supports USB 3.1 Enhanced SuperSpeed
> >      hub 1-0:1.0: USB hub found
> >      hub 1-0:1.0: 1 port detected
> >      usb usb2: We don't know the algorithms for LPM for this host, disabling LPM.
> >      hub 2-0:1.0: USB hub found
> >      hub 2-0:1.0: 1 port detected
> >      dwc3 a400000.usb: Adding to iommu group 4
> >      xhci-hcd xhci-hcd.1.auto: xHCI Host Controller
> >      xhci-hcd xhci-hcd.1.auto: new USB bus registered, assigned bus number 3
> >      xhci-hcd xhci-hcd.1.auto: USB3 root hub has no ports
> >      xhci-hcd xhci-hcd.1.auto: hcc params 0x0220fe65 hci version 0x110 quirks 0x0000000000010010
> >      xhci-hcd xhci-hcd.1.auto: irq 162, io mem 0x0a400000
> >      hub 3-0:1.0: USB hub found
> >      hub 3-0:1.0: 1 port detected
> > 
> > And the list of usb devices:
> > 
> >      dracut:/# ls -alh /sys/bus/usb/devices
> >      total 0
> >      drwxr-xr-x 2 root root 0 Feb 27 00:00 .
> >      drwxr-xr-x 4 root root 0 Feb 27 00:00 ..
> >      lrwxrwxrwx 1 root root 0 Feb 27 00:00 1-0:1.0 -> ../../../devices/platform/soc@0/a8f8800.usb/a800000.usb/xhci-hcd.0.auto/usb1/1-0:1.0
> >      lrwxrwxrwx 1 root root 0 Feb 27 00:00 2-0:1.0 -> ../../../devices/platform/soc@0/a8f8800.usb/a800000.usb/xhci-hcd.0.auto/usb2/2-0:1.0
> >      lrwxrwxrwx 1 root root 0 Feb 27 00:00 3-0:1.0 -> ../../../devices/platform/soc@0/a4f8800.usb/a400000.usb/xhci-hcd.1.auto/usb3/3-0:1.0
> >      lrwxrwxrwx 1 root root 0 Feb 27 00:00 usb1 -> ../../../devices/platform/soc@0/a8f8800.usb/a800000.usb/xhci-hcd.0.auto/usb1
> >      lrwxrwxrwx 1 root root 0 Feb 27 00:00 usb2 -> ../../../devices/platform/soc@0/a8f8800.usb/a800000.usb/xhci-hcd.0.auto/usb2
> >      lrwxrwxrwx 1 root root 0 Feb 27 00:00 usb3 -> ../../../devices/platform/soc@0/a4f8800.usb/a400000.usb/xhci-hcd.1.auto/usb3
> > 
> > Have you also encountered this?
> 
> I've had some issues with QMPPHY not (sometimes?) probing in time on SM6115 only when built as a module.. perhaps it'd be worth checking out of it works fine with =y?

Looks like that might be the cause indeed. The arm64 defconfig has the
PHYs built as modules, but with either CONFIG_PHY_QCOM_QMP_USB=y or
CONFIG_PHY_QCOM_USB_SNPS_FEMTO_V2=y, the controllers initialize properly
all the time.

So, the series is:

Tested-by: Adrien Thierry <athierry@redhat.com>

> 
> 
> Konrad
> 
> > 
> > Best,
> > 
> > Adrien
> > 

Re: [PATCH v1 0/6] arm64: qcom: sa8775p: add support for USB

[Dmitry Baryshkov]

On 25/04/2023 21:03, Adrien Thierry wrote:
> Hi Dmitry,
> 
>> Semi-random suggestion, but could you please try using
>> clk_regmap_phy_mux/clk_regmap_phy_mux_ops for USB pipe clk src?
> 
> Which specific clock are you refering to? I'm not very familiar with
> those, in the device tree I'm seeing "pipe" clocks for usb_0 and usb_1
> phys, but not for usb_2, which is the one that's causing issues.
> 

Ah, I see. Could you please try adding the 
'qcom,select-utmi-as-pipe-clk' property to the usb_2 host node and 
running the test again?


-- 
With best wishes
Dmitry

Re: [PATCH v1 0/6] arm64: qcom: sa8775p: add support for USB

[Adrien Thierry]

Hi Dmitry,

On Sat, Apr 29, 2023 at 12:41:39AM +0300, Dmitry Baryshkov wrote:
> On 25/04/2023 21:03, Adrien Thierry wrote:
> > Hi Dmitry,
> > 
> > > Semi-random suggestion, but could you please try using
> > > clk_regmap_phy_mux/clk_regmap_phy_mux_ops for USB pipe clk src?
> > 
> > Which specific clock are you refering to? I'm not very familiar with
> > those, in the device tree I'm seeing "pipe" clocks for usb_0 and usb_1
> > phys, but not for usb_2, which is the one that's causing issues.
> > 
> 
> Ah, I see. Could you please try adding the 'qcom,select-utmi-as-pipe-clk'
> property to the usb_2 host node and running the test again?
>

Thanks for the suggestion. I tested this but unfortunately the issue is
still happening.

Best,

Adrien