From: "Jonathan Neuschäfer" <j.neuschaefer@gmx.net>
To: Stephen Boyd <sboyd@kernel.org>
Cc: "Jonathan Neuschäfer" <j.neuschaefer@gmx.net>,
linux-clk@vger.kernel.org, openbmc@lists.ozlabs.org,
linux-kernel@vger.kernel.org, linux-watchdog@vger.kernel.org,
devicetree@vger.kernel.org,
"Michael Turquette" <mturquette@baylibre.com>,
"Rob Herring" <robh+dt@kernel.org>,
"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
"Avi Fishman" <avifishman70@gmail.com>,
"Tomer Maimon" <tmaimon77@gmail.com>,
"Tali Perry" <tali.perry1@gmail.com>,
"Patrick Venture" <venture@google.com>,
"Nancy Yuen" <yuenn@google.com>,
"Benjamin Fair" <benjaminfair@google.com>,
"Daniel Lezcano" <daniel.lezcano@linaro.org>,
"Thomas Gleixner" <tglx@linutronix.de>,
"Philipp Zabel" <p.zabel@pengutronix.de>,
"Wim Van Sebroeck" <wim@linux-watchdog.org>,
"Guenter Roeck" <linux@roeck-us.net>,
"Christophe JAILLET" <christophe.jaillet@wanadoo.fr>,
"Joel Stanley" <joel@jms.id.au>
Subject: Re: [PATCH v8 2/2] clk: wpcm450: Add Nuvoton WPCM450 clock/reset controller driver
Date: Sat, 22 Jul 2023 17:15:43 +0200 [thread overview]
Message-ID: <ZLvyn0xq3Msk+lxF@probook> (raw)
In-Reply-To: <4e0a5db18ed7d37038e67be0f1ddcb08.sboyd@kernel.org>
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On Thu, Jul 20, 2023 at 05:02:15PM -0700, Stephen Boyd wrote:
> Quoting Jonathan Neuschäfer (2023-04-28 12:02:26)
> > diff --git a/drivers/clk/clk-wpcm450.c b/drivers/clk/clk-wpcm450.c
[...]
> > +static unsigned long wpcm450_clk_pll_recalc_rate(struct clk_hw *hw,
> > + unsigned long parent_rate)
> > +{
> > + struct wpcm450_clk_pll *pll = to_wpcm450_clk_pll(hw);
> > + unsigned long fbdv, indv, otdv;
> > + u64 rate;
> > + u32 pllcon;
> > +
> > + if (parent_rate == 0) {
> > + pr_err("%s: parent rate is zero", __func__);
>
> This can happen more often than you think, so probably best to remove
> it.
Alright.
> > +static const struct wpcm450_pll_data pll_data[] = {
> > + { "pll0", { .name = "ref" }, REG_PLLCON0, 0 },
>
> This is new code, please don't use .name. Instead use .fw_name or .index with preference to
> .index first and .hw if the pointer is available in this driver.
As far as I can see, .fw_name and .index depend on a struct device*
being passed to clk_hw_register, which won't be available unless I
actually convert the driver to a platform driver.
Not relying on .name would indeed be nice.
> > + // PLLs
>
> Please use /* comments like this */
Ok.
>
> > + for (i = 0; i < ARRAY_SIZE(pll_data); i++) {
> > + const struct wpcm450_pll_data *data = &pll_data[i];
> > +
> > + hw = wpcm450_clk_register_pll(clk_base + data->reg, data->name,
> > + &data->parent, data->flags);
> > + if (IS_ERR(hw)) {
> > + pr_info("Failed to register PLL: %pe", hw);
>
> Missing newline?
Indeed.
> > +CLK_OF_DECLARE(wpcm450_clk_init, "nuvoton,wpcm450-clk", wpcm450_clk_init);
>
> Is something preventing this from being a platform driver?
As far as I remember I have tried to convert it to a platform driver but
wasn't very successful/satisfied. Unfortunately I didn't take detailed notes.
I'll give it another try.
Best regards,
Jonathan
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next prev parent reply other threads:[~2023-07-22 15:16 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-04-28 19:02 [PATCH v8 0/2] Nuvoton WPCM450 clock and reset driver Jonathan Neuschäfer
2023-04-28 19:02 ` [PATCH v8 1/2] dt-bindings: clock: Add Nuvoton WPCM450 clock/reset controller Jonathan Neuschäfer
2023-04-28 19:02 ` [PATCH v8 2/2] clk: wpcm450: Add Nuvoton WPCM450 clock/reset controller driver Jonathan Neuschäfer
2023-07-21 0:02 ` Stephen Boyd
2023-07-22 15:15 ` Jonathan Neuschäfer [this message]
2023-08-01 19:14 ` Stephen Boyd
2023-07-22 21:55 ` Jonathan Neuschäfer
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