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Thu, 17 Aug 2023 15:58:43 +0300 Date: Thu, 17 Aug 2023 15:58:43 +0300 From: Andy Shevchenko To: Marcus Folkesson Cc: Kent Gustavsson , Jonathan Cameron , Lars-Peter Clausen , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Cosmin Tanislav , Arnd Bergmann , ChiYuan Huang , Haibo Chen , Ramona Bolboaca , Ibrahim Tilki , ChiaEn Wu , William Breathitt Gray , linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v6 6/6] iio: adc: mcp3911: add support for the whole MCP39xx family Message-ID: References: <20230817120518.153728-1-marcus.folkesson@gmail.com> <20230817120518.153728-6-marcus.folkesson@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20230817120518.153728-6-marcus.folkesson@gmail.com> Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On Thu, Aug 17, 2023 at 02:05:18PM +0200, Marcus Folkesson wrote: > Microchip does have many similar chips, add support for those. > > The new supported chips are: > - microchip,mcp3910 > - microchip,mcp3912 > - microchip,mcp3913 > - microchip,mcp3914 > - microchip,mcp3918 > - microchip,mcp3919 ... > +static int mcp3910_set_offset(struct mcp3911 *adc, int channel, int val) > +{ unsigned int mask = MCP3910_CONFIG0_EN_OFFCAL; > + int ret; > + > + /* Write offset */ > + ret = mcp3911_write(adc, MCP3910_OFFCAL(channel), val, 3); > + if (ret) > + return ret; > + > + /* Enable offset */ > + return mcp3911_update(adc, MCP3910_REG_CONFIG0, > + MCP3910_CONFIG0_EN_OFFCAL, > + MCP3910_CONFIG0_EN_OFFCAL, 3); return mcp3911_update(adc, MCP3910_REG_CONFIG0, mask, mask, 3); > +} ... > +static int mcp3911_set_offset(struct mcp3911 *adc, int channel, int val) > +{ As per above. > +} ... > +static int mcp3910_set_osr(struct mcp3911 *adc, u32 val) > +{ unsigned int mask = MCP3910_CONFIG0_OSR; > + int osr = FIELD_PREP(MCP3910_CONFIG0_OSR, val); > + > + return mcp3911_update(adc, MCP3910_REG_CONFIG0, > + MCP3910_CONFIG0_OSR, osr, 3); return mcp3911_update(adc, MCP3910_REG_CONFIG0, mask, osr, 3); > +} ... > +static int mcp3911_set_osr(struct mcp3911 *adc, u32 val) In the similar way. ... > +static int mcp3910_set_scale(struct mcp3911 *adc, int channel, u32 val) > +{ > + return mcp3911_update(adc, MCP3910_REG_GAIN, > + MCP3911_GAIN_MASK(channel), > + MCP3911_GAIN_VAL(channel, val), 3); > +} > + > +static int mcp3911_set_scale(struct mcp3911 *adc, int channel, u32 val) > +{ > + return mcp3911_update(adc, MCP3911_REG_GAIN, > + MCP3911_GAIN_MASK(channel), > + MCP3911_GAIN_VAL(channel, val), 1); > +} These can be also converted, but I don't see much difference (same LoC amount, similar readability). ... > + /* Disable offset to ignore any old values in offset register */ > + return mcp3911_update(adc, MCP3910_REG_CONFIG0, > + MCP3910_CONFIG0_EN_OFFCAL, > + MCP3910_CONFIG0_EN_OFFCAL, 3); This is a dup code with some of mcp3910_set_offset(). Perhaps a helper? -- With Best Regards, Andy Shevchenko