From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7FA49C001B0 for ; Mon, 7 Aug 2023 15:53:31 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230238AbjHGPxa (ORCPT ); Mon, 7 Aug 2023 11:53:30 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43106 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229491AbjHGPx3 (ORCPT ); Mon, 7 Aug 2023 11:53:29 -0400 Received: from mgamail.intel.com (mgamail.intel.com [134.134.136.100]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 228EDF0; Mon, 7 Aug 2023 08:53:29 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1691423609; x=1722959609; h=date:from:to:cc:subject:message-id:references: mime-version:in-reply-to; bh=+UzN1I+zo6325mqToFRf2BWfOYgOdV+CV3FDUEYzuF8=; b=Mt89/nP+hmLIsh+4nklMCFxQhPf1cHpDhiuUcrIyE/tlBTvrkOSNVbdy LO9RH7TT0QZcyo2MPmoZHff2HVZC4C3hZFcYDZJqZORJOhLHX8a3JgDys CuXyLzU/GmvHcoxDpUDBqwQRvjL9bdz/ckym3vkVrnes2MRa1irTPVJ9A rliVAsUksZgU4mKw46IHcpDtwoOV4AKJHL1JH9PIN6LmpQhDKJ5uHVsKN n87PRN6Plud17lWzeAB91QOkwSHatIWIonk50aJQMhfCGihOVZcgUpOZS 17h/dJv/5ZDdKif+qde48PWyIN/BGmgvaC+HpUonFoWnir7sjSVnINYhJ A==; X-IronPort-AV: E=McAfee;i="6600,9927,10795"; a="436910322" X-IronPort-AV: E=Sophos;i="6.01,262,1684825200"; d="scan'208";a="436910322" Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 Aug 2023 08:53:28 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10795"; a="800982081" X-IronPort-AV: E=Sophos;i="6.01,262,1684825200"; d="scan'208";a="800982081" Received: from smile.fi.intel.com ([10.237.72.54]) by fmsmga004.fm.intel.com with ESMTP; 07 Aug 2023 08:53:24 -0700 Received: from andy by smile.fi.intel.com with local (Exim 4.96) (envelope-from ) id 1qT2Xp-000eEK-2q; Mon, 07 Aug 2023 18:53:21 +0300 Date: Mon, 7 Aug 2023 18:53:21 +0300 From: Andy Shevchenko To: Marcus Folkesson Cc: Kent Gustavsson , Jonathan Cameron , Lars-Peter Clausen , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Cosmin Tanislav , Arnd Bergmann , ChiYuan Huang , Haibo Chen , Ramona Bolboaca , Ibrahim Tilki , ChiaEn Wu , William Breathitt Gray , linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v3 2/2] iio: adc: mcp3911: add support for the whole MCP39xx family Message-ID: References: <20230807071831.4152183-1-marcus.folkesson@gmail.com> <20230807071831.4152183-2-marcus.folkesson@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20230807071831.4152183-2-marcus.folkesson@gmail.com> Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On Mon, Aug 07, 2023 at 09:18:31AM +0200, Marcus Folkesson wrote: > Microchip does have many similar chips, add support for those. > > The new supported chips are: > - microchip,mcp3910 > - microchip,mcp3912 > - microchip,mcp3913 > - microchip,mcp3914 > - microchip,mcp3918 > - microchip,mcp3919 ... > +#define MCP3910_STATUSCOM_DRHIZ BIT(20) Is it deliberately using spaces? If so, why? ... > +static int mcp3910_get_osr(struct mcp3911 *adc, int *val) > +{ > + int ret, osr; > + > + ret = mcp3911_read(adc, MCP3910_REG_CONFIG0, val, 3); > + osr = FIELD_GET(MCP3910_CONFIG0_OSR, *val); > + *val = 32 << osr; > + return ret; I believe this is wrong order. Or bad code. The rule of thumb is not pollute the output variable if we know the error happened. Same applies to another function. > +} ... > - ret = mcp3911_config(adc); > + ret = device_property_read_u32(&adc->spi->dev, "microchip,device-addr", &adc->dev_addr); Why not spi->dev? Ditto for other uses like this. -- With Best Regards, Andy Shevchenko