[PATCH net-next 1/2] dt-bindings: net: ethernet-controller: add PSGMII mode

[PATCH net-next 1/2] dt-bindings: net: ethernet-controller: add PSGMII mode

[Robert Marko]

Add a new PSGMII mode which is similar to QSGMII with the difference being
that it combines 5 SGMII lines into a single link compared to 4 on QSGMII.

It is commonly used by Qualcomm on their QCA807x PHY series.

Signed-off-by: Robert Marko <robert.marko@sartura.hr>
---
 Documentation/devicetree/bindings/net/ethernet-controller.yaml | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/net/ethernet-controller.yaml b/Documentation/devicetree/bindings/net/ethernet-controller.yaml
index 6b0d359367da..9f6a5ccbcefe 100644
--- a/Documentation/devicetree/bindings/net/ethernet-controller.yaml
+++ b/Documentation/devicetree/bindings/net/ethernet-controller.yaml
@@ -66,6 +66,7 @@ properties:
       - mii
       - gmii
       - sgmii
+      - psgmii
       - qsgmii
       - qusgmii
       - tbi
-- 
2.41.0

[PATCH net-next 2/2] net: phy: Introduce PSGMII PHY interface mode

[Robert Marko]

From: Gabor Juhos <j4g8y7@gmail.com>

The PSGMII interface is similar to QSGMII. The main difference
is that the PSGMII interface combines five SGMII lines into a
single link while in QSGMII only four lines are combined.

Similarly to the QSGMII, this interface mode might also needs
special handling within the MAC driver.

It is commonly used by Qualcomm with their QCA807x PHY series and
modern WiSoC-s.

Add definitions for the PHY layer to allow to express this type
of connection between the MAC and PHY.

Signed-off-by: Gabor Juhos <j4g8y7@gmail.com>
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
---
 drivers/net/phy/phy-core.c | 2 ++
 drivers/net/phy/phylink.c  | 3 +++
 include/linux/phy.h        | 3 +++
 3 files changed, 8 insertions(+)

diff --git a/drivers/net/phy/phy-core.c b/drivers/net/phy/phy-core.c
index a64186dc53f8..966c93cbe616 100644
--- a/drivers/net/phy/phy-core.c
+++ b/drivers/net/phy/phy-core.c
@@ -142,6 +142,8 @@ int phy_interface_num_ports(phy_interface_t interface)
 	case PHY_INTERFACE_MODE_QSGMII:
 	case PHY_INTERFACE_MODE_QUSGMII:
 		return 4;
+	case PHY_INTERFACE_MODE_PSGMII:
+		return 5;
 	case PHY_INTERFACE_MODE_MAX:
 		WARN_ONCE(1, "PHY_INTERFACE_MODE_MAX isn't a valid interface mode");
 		return 0;
diff --git a/drivers/net/phy/phylink.c b/drivers/net/phy/phylink.c
index 4f1c8bb199e9..160bce608c34 100644
--- a/drivers/net/phy/phylink.c
+++ b/drivers/net/phy/phylink.c
@@ -210,6 +210,7 @@ static int phylink_interface_max_speed(phy_interface_t interface)
 	case PHY_INTERFACE_MODE_RGMII_RXID:
 	case PHY_INTERFACE_MODE_RGMII_ID:
 	case PHY_INTERFACE_MODE_RGMII:
+	case PHY_INTERFACE_MODE_PSGMII:
 	case PHY_INTERFACE_MODE_QSGMII:
 	case PHY_INTERFACE_MODE_QUSGMII:
 	case PHY_INTERFACE_MODE_SGMII:
@@ -475,6 +476,7 @@ unsigned long phylink_get_capabilities(phy_interface_t interface,
 	case PHY_INTERFACE_MODE_RGMII_RXID:
 	case PHY_INTERFACE_MODE_RGMII_ID:
 	case PHY_INTERFACE_MODE_RGMII:
+	case PHY_INTERFACE_MODE_PSGMII:
 	case PHY_INTERFACE_MODE_QSGMII:
 	case PHY_INTERFACE_MODE_QUSGMII:
 	case PHY_INTERFACE_MODE_SGMII:
@@ -868,6 +870,7 @@ static int phylink_parse_mode(struct phylink *pl,
 
 		switch (pl->link_config.interface) {
 		case PHY_INTERFACE_MODE_SGMII:
+		case PHY_INTERFACE_MODE_PSGMII:
 		case PHY_INTERFACE_MODE_QSGMII:
 		case PHY_INTERFACE_MODE_QUSGMII:
 		case PHY_INTERFACE_MODE_RGMII:
diff --git a/include/linux/phy.h b/include/linux/phy.h
index ba08b0e60279..23756a10d40b 100644
--- a/include/linux/phy.h
+++ b/include/linux/phy.h
@@ -147,6 +147,7 @@ typedef enum {
 	PHY_INTERFACE_MODE_XGMII,
 	PHY_INTERFACE_MODE_XLGMII,
 	PHY_INTERFACE_MODE_MOCA,
+	PHY_INTERFACE_MODE_PSGMII,
 	PHY_INTERFACE_MODE_QSGMII,
 	PHY_INTERFACE_MODE_TRGMII,
 	PHY_INTERFACE_MODE_100BASEX,
@@ -254,6 +255,8 @@ static inline const char *phy_modes(phy_interface_t interface)
 		return "xlgmii";
 	case PHY_INTERFACE_MODE_MOCA:
 		return "moca";
+	case PHY_INTERFACE_MODE_PSGMII:
+		return "psgmii";
 	case PHY_INTERFACE_MODE_QSGMII:
 		return "qsgmii";
 	case PHY_INTERFACE_MODE_TRGMII:
-- 
2.41.0

Re: [PATCH net-next 2/2] net: phy: Introduce PSGMII PHY interface mode

[Russell King (Oracle)]

On Thu, Aug 10, 2023 at 12:22:55PM +0200, Robert Marko wrote:
> From: Gabor Juhos <j4g8y7@gmail.com>
> 
> The PSGMII interface is similar to QSGMII. The main difference
> is that the PSGMII interface combines five SGMII lines into a
> single link while in QSGMII only four lines are combined.

Please also update the docs at Documentation/networking/phy.rst
section "PHY interface modes" to describe this mode. Thanks.

-- 
RMK's Patch system: https://www.armlinux.org.uk/developer/patches/
FTTP is here! 80Mbps down 10Mbps up. Decent connectivity at last!

Re: [PATCH net-next 2/2] net: phy: Introduce PSGMII PHY interface mode

[Simon Horman]

On Thu, Aug 10, 2023 at 12:22:55PM +0200, Robert Marko wrote:
> From: Gabor Juhos <j4g8y7@gmail.com>
> 
> The PSGMII interface is similar to QSGMII. The main difference
> is that the PSGMII interface combines five SGMII lines into a
> single link while in QSGMII only four lines are combined.
> 
> Similarly to the QSGMII, this interface mode might also needs
> special handling within the MAC driver.
> 
> It is commonly used by Qualcomm with their QCA807x PHY series and
> modern WiSoC-s.
> 
> Add definitions for the PHY layer to allow to express this type
> of connection between the MAC and PHY.
> 
> Signed-off-by: Gabor Juhos <j4g8y7@gmail.com>
> Signed-off-by: Robert Marko <robert.marko@sartura.hr>

...

> diff --git a/include/linux/phy.h b/include/linux/phy.h
> index ba08b0e60279..23756a10d40b 100644
> --- a/include/linux/phy.h
> +++ b/include/linux/phy.h
> @@ -147,6 +147,7 @@ typedef enum {
>  	PHY_INTERFACE_MODE_XGMII,
>  	PHY_INTERFACE_MODE_XLGMII,
>  	PHY_INTERFACE_MODE_MOCA,
> +	PHY_INTERFACE_MODE_PSGMII,

Hi Gabor an Robert,

Please add PHY_INTERFACE_MODE_PSGMII to the kernel doc for phy_interface_t
which appears a little earlier in phy.h

>  	PHY_INTERFACE_MODE_QSGMII,
>  	PHY_INTERFACE_MODE_TRGMII,
>  	PHY_INTERFACE_MODE_100BASEX,

...

Re: [PATCH net-next 2/2] net: phy: Introduce PSGMII PHY interface mode

[Robert Marko]

On Fri, Aug 11, 2023 at 12:54 PM Simon Horman <horms@kernel.org> wrote:
>
> On Thu, Aug 10, 2023 at 12:22:55PM +0200, Robert Marko wrote:
> > From: Gabor Juhos <j4g8y7@gmail.com>
> >
> > The PSGMII interface is similar to QSGMII. The main difference
> > is that the PSGMII interface combines five SGMII lines into a
> > single link while in QSGMII only four lines are combined.
> >
> > Similarly to the QSGMII, this interface mode might also needs
> > special handling within the MAC driver.
> >
> > It is commonly used by Qualcomm with their QCA807x PHY series and
> > modern WiSoC-s.
> >
> > Add definitions for the PHY layer to allow to express this type
> > of connection between the MAC and PHY.
> >
> > Signed-off-by: Gabor Juhos <j4g8y7@gmail.com>
> > Signed-off-by: Robert Marko <robert.marko@sartura.hr>
>
> ...
>
> > diff --git a/include/linux/phy.h b/include/linux/phy.h
> > index ba08b0e60279..23756a10d40b 100644
> > --- a/include/linux/phy.h
> > +++ b/include/linux/phy.h
> > @@ -147,6 +147,7 @@ typedef enum {
> >       PHY_INTERFACE_MODE_XGMII,
> >       PHY_INTERFACE_MODE_XLGMII,
> >       PHY_INTERFACE_MODE_MOCA,
> > +     PHY_INTERFACE_MODE_PSGMII,
>
> Hi Gabor an Robert,
>
> Please add PHY_INTERFACE_MODE_PSGMII to the kernel doc for phy_interface_t
> which appears a little earlier in phy.h

Hi,
I already have it prepared as part of v2, will send it later today.

Regards,
Robert
>
> >       PHY_INTERFACE_MODE_QSGMII,
> >       PHY_INTERFACE_MODE_TRGMII,
> >       PHY_INTERFACE_MODE_100BASEX,
>
> ...



-- 
Robert Marko
Staff Embedded Linux Engineer
Sartura Ltd.
Lendavska ulica 16a
10000 Zagreb, Croatia
Email: robert.marko@sartura.hr
Web: www.sartura.hr

Re: [PATCH net-next 1/2] dt-bindings: net: ethernet-controller: add PSGMII mode

[Rob Herring]

On Thu, 10 Aug 2023 12:22:54 +0200, Robert Marko wrote:
> Add a new PSGMII mode which is similar to QSGMII with the difference being
> that it combines 5 SGMII lines into a single link compared to 4 on QSGMII.
> 
> It is commonly used by Qualcomm on their QCA807x PHY series.
> 
> Signed-off-by: Robert Marko <robert.marko@sartura.hr>
> ---
>  Documentation/devicetree/bindings/net/ethernet-controller.yaml | 1 +
>  1 file changed, 1 insertion(+)
> 

My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check'
on your patch (DT_CHECKER_FLAGS is new in v5.13):

yamllint warnings/errors:

dtschema/dtc warnings/errors:


doc reference errors (make refcheckdocs):

See https://patchwork.ozlabs.org/project/devicetree-bindings/patch/20230810102309.223183-1-robert.marko@sartura.hr

The base for the series is generally the latest rc1. A different dependency
should be noted in *this* patch.

If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:

pip3 install dtschema --upgrade

Please check and re-submit after running the above command yourself. Note
that DT_SCHEMA_FILES can be set to your schema file to speed up checking
your schema. However, it must be unset to test all examples with your schema.

Re: [PATCH net-next 1/2] dt-bindings: net: ethernet-controller: add PSGMII mode

[Robert Marko]

On Thu, Aug 10, 2023 at 1:21 PM Rob Herring <robh@kernel.org> wrote:
>
>
> On Thu, 10 Aug 2023 12:22:54 +0200, Robert Marko wrote:
> > Add a new PSGMII mode which is similar to QSGMII with the difference being
> > that it combines 5 SGMII lines into a single link compared to 4 on QSGMII.
> >
> > It is commonly used by Qualcomm on their QCA807x PHY series.
> >
> > Signed-off-by: Robert Marko <robert.marko@sartura.hr>
> > ---
> >  Documentation/devicetree/bindings/net/ethernet-controller.yaml | 1 +
> >  1 file changed, 1 insertion(+)
> >
>
> My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check'
> on your patch (DT_CHECKER_FLAGS is new in v5.13):
>
> yamllint warnings/errors:
>
> dtschema/dtc warnings/errors:
>
>
> doc reference errors (make refcheckdocs):

I am not getting any errors, nor there are any listed here as well.
Is this a bot issue maybe?

Regards
Robert
>
> See https://patchwork.ozlabs.org/project/devicetree-bindings/patch/20230810102309.223183-1-robert.marko@sartura.hr
>
> The base for the series is generally the latest rc1. A different dependency
> should be noted in *this* patch.
>
> If you already ran 'make dt_binding_check' and didn't see the above
> error(s), then make sure 'yamllint' is installed and dt-schema is up to
> date:
>
> pip3 install dtschema --upgrade
>
> Please check and re-submit after running the above command yourself. Note
> that DT_SCHEMA_FILES can be set to your schema file to speed up checking
> your schema. However, it must be unset to test all examples with your schema.
>


-- 
Robert Marko
Staff Embedded Linux Engineer
Sartura Ltd.
Lendavska ulica 16a
10000 Zagreb, Croatia
Email: robert.marko@sartura.hr
Web: www.sartura.hr

Re: [PATCH net-next 1/2] dt-bindings: net: ethernet-controller: add PSGMII mode

[Rob Herring]

On Thu, Aug 10, 2023 at 5:32 AM Robert Marko <robert.marko@sartura.hr> wrote:
>
> On Thu, Aug 10, 2023 at 1:21 PM Rob Herring <robh@kernel.org> wrote:
> >
> >
> > On Thu, 10 Aug 2023 12:22:54 +0200, Robert Marko wrote:
> > > Add a new PSGMII mode which is similar to QSGMII with the difference being
> > > that it combines 5 SGMII lines into a single link compared to 4 on QSGMII.
> > >
> > > It is commonly used by Qualcomm on their QCA807x PHY series.
> > >
> > > Signed-off-by: Robert Marko <robert.marko@sartura.hr>
> > > ---
> > >  Documentation/devicetree/bindings/net/ethernet-controller.yaml | 1 +
> > >  1 file changed, 1 insertion(+)
> > >
> >
> > My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check'
> > on your patch (DT_CHECKER_FLAGS is new in v5.13):
> >
> > yamllint warnings/errors:
> >
> > dtschema/dtc warnings/errors:
> >
> >
> > doc reference errors (make refcheckdocs):
>
> I am not getting any errors, nor there are any listed here as well.
> Is this a bot issue maybe?

Yes. Converting dtschema to pyproject.toml yesterday did not go well...

Rob

Re: [PATCH net-next 1/2] dt-bindings: net: ethernet-controller: add PSGMII mode

[Rob Herring]

On Thu, 10 Aug 2023 12:22:54 +0200, Robert Marko wrote:
> Add a new PSGMII mode which is similar to QSGMII with the difference being
> that it combines 5 SGMII lines into a single link compared to 4 on QSGMII.
> 
> It is commonly used by Qualcomm on their QCA807x PHY series.
> 
> Signed-off-by: Robert Marko <robert.marko@sartura.hr>
> ---
>  Documentation/devicetree/bindings/net/ethernet-controller.yaml | 1 +
>  1 file changed, 1 insertion(+)
> 

Acked-by: Rob Herring <robh@kernel.org>