From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
To: Ryan Chen <ryan_chen@aspeedtech.com>
Cc: "jk@codeconstruct.com.au" <jk@codeconstruct.com.au>,
Brendan Higgins <brendan.higgins@linux.dev>,
Benjamin Herrenschmidt <benh@kernel.crashing.org>,
Joel Stanley <joel@jms.id.au>, Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Andrew Jeffery <andrew@aj.id.au>,
Philipp Zabel <p.zabel@pengutronix.de>,
Wolfram Sang <wsa@kernel.org>,
"linux-i2c@vger.kernel.org" <linux-i2c@vger.kernel.org>,
Florian Fainelli <f.fainelli@gmail.com>,
Jean Delvare <jdelvare@suse.de>,
William Zhang <william.zhang@broadcom.com>,
Tyrone Ting <kfting@nuvoton.com>,
Tharun Kumar P <tharunkumar.pasumarthi@microchip.com>,
Conor Dooley <conor.dooley@microchip.com>,
Phil Edworthy <phil.edworthy@renesas.com>,
"openbmc@lists.ozlabs.org" <openbmc@lists.ozlabs.org>,
"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>,
"linux-aspeed@lists.ozlabs.org" <linux-aspeed@lists.ozlabs.org>,
"=linux-kernel@vger.kernel.org" <=linux-kernel@vger.kernel.org>,
Andi Shyti <andi.shyti@kernel.org>
Subject: Re: [PATCH v12 2/2] i2c: aspeed: support ast2600 i2c new register mode driver
Date: Thu, 31 Aug 2023 17:18:26 +0300 [thread overview]
Message-ID: <ZPChMrsKrOQppY1F@smile.fi.intel.com> (raw)
In-Reply-To: <SEZPR06MB5269A43F801EF04F39461174F2E5A@SEZPR06MB5269.apcprd06.prod.outlook.com>
On Thu, Aug 31, 2023 at 06:04:30AM +0000, Ryan Chen wrote:
> > On Fri, Jul 14, 2023 at 03:45:22PM +0800, Ryan Chen wrote:
Stop overquoting! Remove the context you are not answering to.
...
> > > + if (--i % 4 != 3)
> > > + writel(*(u32 *)wbuf, i2c_bus->buf_base + i - (i % 4));
> > > + writel(AST2600_I2CC_SET_TX_BUF_LEN(xfer_len),
> > > + i2c_bus->reg_base + AST2600_I2CC_BUFF_CTRL);
> >
> > Wrong memory accessors. You should use something from asm/byteorder.h
> > which includes linux/byteorder/generic.h.
> >
>
> Are you preferring add comment to explain more by following?
> /*
> * The controller's buffer register supports dword writes only.
> * Therefore, write dwords to the buffer register in a 4-byte aligned,
> * and write the remaining unaligned data at the end.
> */
This does not explain endianess bug (or feature) it has.
You are using CPU side byteorder for the aligned data.
This is not okay, on top of the code looking ugly and
prone to errors. Note, that somebody may refer to your
code, once accepted, in educational purposes, but since
the code is not good written, it makes a false positive
impression that this is the right thing to do in the similar
case elsewhere.
Please, fix this.
> for (i = 0; i < xfer_len; i++) {
> wbuf[i % 4] = msg->buf[i2c_bus->master_xfer_cnt + i];
> /* accumulating 4 bytes of data, write as a Dword to the buffer register */
> if (i % 4 == 3)
> writel(*(u32 *)wbuf, i2c_bus->buf_base + i - 3);
> }
> /* less than 4 bytes of remaining data, write the remaining part as a Dword */
> if (--i % 4 != 3)
> writel(*(u32 *)wbuf, i2c_bus->buf_base + i - (i % 4));
> writel(AST2600_I2CC_SET_TX_BUF_LEN(xfer_len),
> i2c_bus->reg_base + AST2600_I2CC_BUFF_CTRL);
>
> Or more columns (use get_unaligned_le32(wbuf); ) by following.
>
> for (i = 0; i < xfer_len; i++) {
> wbuf[i % 4] = msg->buf[i2c_bus->master_xfer_cnt + i];
> if (i % 4 == 3) {
> wbuf_dword = get_unaligned_le32(wbuf);
> writel(wbuf_dword, i2c_bus->buf_base + i - 3);
> }
> }
>
> if (--i % 4 != 3) {
> wbuf_dword = get_unaligned_le32(wbuf);
> writel(wbuf_dword, i2c_bus->buf_base + i - (i % 4));
> }
--
With Best Regards,
Andy Shevchenko
next prev parent reply other threads:[~2023-08-31 14:26 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-07-14 7:45 [PATCH v12 0/2] Add ASPEED AST2600 I2Cv2 controller driver Ryan Chen
2023-07-14 7:45 ` [PATCH v12 1/2] dt-bindings: i2c: aspeed: support for AST2600-i2cv2 Ryan Chen
2023-07-14 7:45 ` [PATCH v12 2/2] i2c: aspeed: support ast2600 i2c new register mode driver Ryan Chen
2023-07-14 8:03 ` Krzysztof Kozlowski
2023-07-14 8:08 ` Ryan Chen
2023-07-14 8:56 ` Andy Shevchenko
2023-07-14 8:57 ` Krzysztof Kozlowski
2023-07-14 9:26 ` Ryan Chen
2023-07-26 3:38 ` Ryan Chen
2023-07-26 6:31 ` Krzysztof Kozlowski
2023-07-26 6:19 ` Ryan Chen
2023-07-14 8:55 ` Andy Shevchenko
2023-08-31 6:04 ` Ryan Chen
2023-08-31 14:18 ` Andy Shevchenko [this message]
2023-09-05 6:52 ` Ryan Chen
2023-09-05 11:55 ` Andy Shevchenko
2023-10-05 6:21 ` Ryan Chen
2023-10-05 11:56 ` Andy Shevchenko
2023-10-11 7:36 ` Ryan Chen
2023-10-11 8:17 ` Ryan Chen
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