From: Jisheng Zhang <jszhang@kernel.org>
To: Drew Fustini <dfustini@baylibre.com>
Cc: Jiexun Wang <wangjiexun@tinylab.org>,
adrian.hunter@intel.com, aou@eecs.berkeley.edu,
conor+dt@kernel.org, conor@kernel.org,
devicetree@vger.kernel.org, guoren@kernel.org,
jkridner@beagleboard.org, krzysztof.kozlowski+dt@linaro.org,
linux-kernel@vger.kernel.org, linux-mmc@vger.kernel.org,
linux-riscv@lists.infradead.org, palmer@dabbelt.com,
paul.walmsley@sifive.com, robertcnelson@beagleboard.org,
robh+dt@kernel.org, ulf.hansson@linaro.org, wefu@redhat.com
Subject: Re: [PATCH RFC v2 0/4] RISC-V: Add basic eMMC support for BeagleV Ahead
Date: Mon, 4 Sep 2023 22:53:11 +0800 [thread overview]
Message-ID: <ZPXvV/1dbUf7g+0a@xhacker> (raw)
In-Reply-To: <ZO4MmdNRqrye/x2b@x1>
On Tue, Aug 29, 2023 at 08:19:53AM -0700, Drew Fustini wrote:
> On Tue, Aug 29, 2023 at 09:56:47AM +0800, Jiexun Wang wrote:
> > Date: Mon, 28 Aug 2023 23:05:35 +0800, Jisheng Zhang wrote:
> > >On Mon, Aug 28, 2023 at 12:40:16PM +0800, Jiexun Wang wrote:
> > >> Hello,
> > >> I tested the patch on my LicheePi 4A board.
> > >> It can successfully boot with eMMC, but when I use the eMMC more frequently - for instance:
> > >>
> > >> $ while true; do /bin/dd if=/dev/zero of=bigfile bs=1024000 count=1024; done &
> > >>
> > >> I encounter the following error:
> > >>
> > >> sbi_trap_error: hart1: illegal instruction handler failed (error -2)
> > >
> > >> sbi_trap_error: hart1: mcause=0x0000000000000002 mtval=0x0000000060e2de4f
> > >> sbi_trap_error: hart1: mepc=0x000000000001897c mstatus=0x0000000a00001820
> > >> sbi_trap_error: hart1: ra=0x00000000000170f8 sp=0x000000000004adc8
> > >> sbi_trap_error: hart1: gp=0xffffffff8136ea90 tp=0xffffffd900228000
> > >> sbi_trap_error: hart1: s0=0x0000000000000000 s1=0x000000000004ae08
> > >> sbi_trap_error: hart1: a0=0x000000003f9aa9bc a1=0x0000000000000004
> > >> sbi_trap_error: hart1: a2=0x0000000000000000 a3=0x0000000000000000
> > >> sbi_trap_error: hart1: a4=0x0000000000042248 a5=0x00000000000170e5
> > >> sbi_trap_error: hart1: a6=0x0000000000000000 a7=0x0000000054494d45
> > >> sbi_trap_error: hart1: s2=0x000000000004aee8 s3=0x0000000000000000
> > >> sbi_trap_error: hart1: s4=0x000000000004ae08 s5=0x0000000000000000
> > >> sbi_trap_error: hart1: s6=0xffffffff813aa240 s7=0x0000000000000080
> > >> sbi_trap_error: hart1: s8=0xffffffff80a1b5f0 s9=0x0000000000000000
> > >> sbi_trap_error: hart1: s10=0xffffffd9fef5d380 s11=0xffffffff81290a80
> > >> sbi_trap_error: hart1: t0=0x0000000a00000820 t1=0x0000000000000000
> > >> sbi_trap_error: hart1: t2=0xffffffff80c00318 t3=0x0000000000000001
> > >> sbi_trap_error: hart1: t4=0x0000000000000330 t5=0x0000000000000001
> > >> sbi_trap_error: hart1: t6=0x0000000000040000
> > >>
> > >> My kernel version is v6.5-rc3.
> > >> My OpenSBI version is 1.3.
> > >> I tried to use other versions of OpenSBI, yet the problem persists.
> > >> Is there a possibility of any underlying bug? Your insights into this would be greatly appreciated.
> > >
> > >
> > >Can you plz try below opensbi?
> >
> > I tried the OpenSBI you provided and the issue didn't recur.
> > I conducted stress test about 30 minutes and the system appears to be functioning very well.
> > Thank you so much for helping me resolve this problem.
>
> That's great!
>
> Jisheng - are these the commits that fix the error?
>
> d98da90a19b5 ("lib: sbi_illegal_insn: Fix FENCE.TSO emulation infinite trap loop")
> 39d1e698c975 ("lib: sbi_illegal_insn: Add emulation for fence.tso")
>
These two commits have been in upstream OpenSBI, so there
must be something to be patched/fixed in the upstream OpenSBI, but I have not
yet bisected the upstream OpenSBI to find the root cause.
This issue is on my TODO list.
prev parent reply other threads:[~2023-09-04 15:05 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-08-05 3:14 [PATCH RFC v2 0/4] RISC-V: Add basic eMMC support for BeagleV Ahead Drew Fustini
2023-08-05 3:14 ` [PATCH RFC v2 1/4] dt-bindings: mmc: sdhci-of-dwcmhsc: Add T-Head TH1520 support Drew Fustini
2023-08-07 6:29 ` Krzysztof Kozlowski
2023-08-16 22:26 ` Drew Fustini
2023-08-19 13:06 ` Krzysztof Kozlowski
2023-08-05 3:14 ` [PATCH RFC v2 2/4] riscv: dts: thead: Add TH1520 mmc controller and sdhci clock Drew Fustini
2023-08-05 3:14 ` [PATCH RFC v2 3/4] riscv: dts: thead: Enable BeagleV Ahead eMMC controller Drew Fustini
2023-08-05 3:14 ` [PATCH RFC v2 4/4] mmc: sdhci-of-dwcmshc: Add support for T-Head TH1520 Drew Fustini
2023-08-06 10:09 ` Jisheng Zhang
2023-08-16 21:17 ` Drew Fustini
2023-08-17 23:32 ` Guo Ren
2023-08-28 4:40 ` [PATCH RFC v2 0/4] RISC-V: Add basic eMMC support for BeagleV Ahead Jiexun Wang
2023-08-28 15:05 ` Jisheng Zhang
2023-08-29 1:56 ` Jiexun Wang
2023-08-29 15:19 ` Drew Fustini
2023-09-04 14:53 ` Jisheng Zhang [this message]
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