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* [PATCH v2] riscv: dts: thead: set dma-noncoherent to soc bus
@ 2023-09-12  7:22 Jisheng Zhang
  2023-09-12 14:48 ` Guo Ren
                   ` (2 more replies)
  0 siblings, 3 replies; 12+ messages in thread
From: Jisheng Zhang @ 2023-09-12  7:22 UTC (permalink / raw)
  To: Guo Ren, Fu Wei, Conor Dooley, Rob Herring, Krzysztof Kozlowski,
	Paul Walmsley, Palmer Dabbelt, Albert Ou
  Cc: linux-riscv, devicetree, linux-kernel, Drew Fustini

riscv select ARCH_DMA_DEFAULT_COHERENT by default, and th1520 isn't
dma coherent, so set dma-noncoherent to reflect this fact.

Signed-off-by: Jisheng Zhang <jszhang@kernel.org>
Tested-by: Drew Fustini <dfustini@baylibre.com>
---

Since v1:
 - rebase on v6.6-rc1
 - collect Tested-by tag

 arch/riscv/boot/dts/thead/th1520.dtsi | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/riscv/boot/dts/thead/th1520.dtsi b/arch/riscv/boot/dts/thead/th1520.dtsi
index ce708183b6f6..ff364709a6df 100644
--- a/arch/riscv/boot/dts/thead/th1520.dtsi
+++ b/arch/riscv/boot/dts/thead/th1520.dtsi
@@ -139,6 +139,7 @@ soc {
 		interrupt-parent = <&plic>;
 		#address-cells = <2>;
 		#size-cells = <2>;
+		dma-noncoherent;
 		ranges;
 
 		plic: interrupt-controller@ffd8000000 {
-- 
2.40.1


^ permalink raw reply related	[flat|nested] 12+ messages in thread

end of thread, other threads:[~2023-11-12  0:55 UTC | newest]

Thread overview: 12+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2023-09-12  7:22 [PATCH v2] riscv: dts: thead: set dma-noncoherent to soc bus Jisheng Zhang
2023-09-12 14:48 ` Guo Ren
2023-09-12 16:27 ` Conor Dooley
2023-09-13 15:15   ` Jisheng Zhang
2023-09-13 15:44     ` Conor Dooley
2023-09-20  8:36       ` Conor Dooley
2023-09-21  9:24         ` Jisheng Zhang
2023-09-21 10:08           ` Conor Dooley
2023-10-16 17:10             ` Drew Fustini
2023-10-17 16:09               ` Jisheng Zhang
2023-10-17 20:33                 ` Arnd Bergmann
2023-11-12  0:55 ` patchwork-bot+linux-riscv

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