From: Jisheng Zhang <jszhang@kernel.org>
To: Conor Dooley <conor@kernel.org>
Cc: linux-riscv@lists.infradead.org,
Conor Dooley <conor.dooley@microchip.com>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Conor Dooley <conor+dt@kernel.org>,
Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>, Chen-Yu Tsai <wens@csie.org>,
Jernej Skrabec <jernej.skrabec@gmail.com>,
Samuel Holland <samuel@sholland.org>,
Daire McNamara <daire.mcnamara@microchip.com>,
Geert Uytterhoeven <geert+renesas@glider.be>,
Magnus Damm <magnus.damm@gmail.com>,
Emil Renner Berthing <kernel@esmil.dk>,
Guo Ren <guoren@kernel.org>, Fu Wei <wefu@redhat.com>,
Chen Wang <unicorn_wang@outlook.com>,
devicetree@vger.kernel.org, linux-sunxi@lists.linux.dev,
linux-renesas-soc@vger.kernel.org
Subject: Re: [RFC v2 6/6] riscv: dts: thead: convert isa detection to new properties
Date: Wed, 4 Oct 2023 20:13:30 +0800 [thread overview]
Message-ID: <ZR1W6lI3O6Pkjxm3@xhacker> (raw)
In-Reply-To: <20230922081351.30239-8-conor@kernel.org>
On Fri, Sep 22, 2023 at 09:13:51AM +0100, Conor Dooley wrote:
> From: Conor Dooley <conor.dooley@microchip.com>
>
> Convert the th1520 devicetrees to use the new properties
> "riscv,isa-base" & "riscv,isa-extensions".
> For compatibility with other projects, "riscv,isa" remains.
>
> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Jisheng Zhang <jszhang@kernel.org>
> ---
> arch/riscv/boot/dts/thead/th1520.dtsi | 12 ++++++++++++
> 1 file changed, 12 insertions(+)
>
> diff --git a/arch/riscv/boot/dts/thead/th1520.dtsi b/arch/riscv/boot/dts/thead/th1520.dtsi
> index ce708183b6f6..723f65487246 100644
> --- a/arch/riscv/boot/dts/thead/th1520.dtsi
> +++ b/arch/riscv/boot/dts/thead/th1520.dtsi
> @@ -20,6 +20,9 @@ c910_0: cpu@0 {
> compatible = "thead,c910", "riscv";
> device_type = "cpu";
> riscv,isa = "rv64imafdc";
> + riscv,isa-base = "rv64i";
> + riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "zicntr", "zicsr",
> + "zifencei", "zihpm";
> reg = <0>;
> i-cache-block-size = <64>;
> i-cache-size = <65536>;
> @@ -41,6 +44,9 @@ c910_1: cpu@1 {
> compatible = "thead,c910", "riscv";
> device_type = "cpu";
> riscv,isa = "rv64imafdc";
> + riscv,isa-base = "rv64i";
> + riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "zicntr", "zicsr",
> + "zifencei", "zihpm";
> reg = <1>;
> i-cache-block-size = <64>;
> i-cache-size = <65536>;
> @@ -62,6 +68,9 @@ c910_2: cpu@2 {
> compatible = "thead,c910", "riscv";
> device_type = "cpu";
> riscv,isa = "rv64imafdc";
> + riscv,isa-base = "rv64i";
> + riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "zicntr", "zicsr",
> + "zifencei", "zihpm";
> reg = <2>;
> i-cache-block-size = <64>;
> i-cache-size = <65536>;
> @@ -83,6 +92,9 @@ c910_3: cpu@3 {
> compatible = "thead,c910", "riscv";
> device_type = "cpu";
> riscv,isa = "rv64imafdc";
> + riscv,isa-base = "rv64i";
> + riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "zicntr", "zicsr",
> + "zifencei", "zihpm";
> reg = <3>;
> i-cache-block-size = <64>;
> i-cache-size = <65536>;
> --
> 2.41.0
>
prev parent reply other threads:[~2023-10-04 12:25 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-09-22 8:13 [RFC v2 0/6] riscv,isa-extensions additions Conor Dooley
2023-09-22 8:13 ` [RFC v2 1/6] riscv: dts: microchip: convert isa detection to new properties Conor Dooley
2023-09-22 8:13 ` [RFC v2 2/6] riscv: dts: sifive: " Conor Dooley
2023-09-25 17:38 ` Samuel Holland
2023-09-22 8:13 ` [RFC v2 3/6] riscv: dts: starfive: " Conor Dooley
2023-09-22 8:13 ` [RFC v2 4/6] riscv: dts: renesas: " Conor Dooley
2023-09-22 8:13 ` [RFC v2 5/6] riscv: dts: allwinner: " Conor Dooley
2023-09-24 19:42 ` Jernej Škrabec
2023-09-22 8:13 ` [RFC v2 6/6] riscv: dts: thead: " Conor Dooley
2023-09-23 7:50 ` Guo Ren
2023-09-23 10:25 ` Conor Dooley
2023-10-09 1:01 ` Guo Ren
2023-09-23 23:22 ` Icenowy Zheng
2023-09-25 15:59 ` Conor Dooley
2023-09-26 3:15 ` Icenowy Zheng
2023-09-26 9:14 ` Conor Dooley
2023-10-04 12:13 ` Jisheng Zhang [this message]
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