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Date: Mon, 13 Nov 2023 22:00:17 +0800
From: Jisheng Zhang <jszhang@kernel.org>
To: Conor Dooley <conor@kernel.org>
Cc: Philipp Zabel <p.zabel@pengutronix.de>,
	Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Albert Ou <aou@eecs.berkeley.edu>, Chao Wei <chao.wei@sophgo.com>,
	Chen Wang <unicorn_wang@outlook.com>, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org
Subject: Re: [PATCH 1/4] dt-bindings: reset: Add binding for Sophgo CV1800B
 reset controller
Message-ID: <ZVIr8VH+29lpSpxb@xhacker>
References: <20231113005503.2423-1-jszhang@kernel.org>
 <20231113005503.2423-2-jszhang@kernel.org>
 <20231113-washable-elbow-629bf42b9be1@squawk>
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In-Reply-To: <20231113-washable-elbow-629bf42b9be1@squawk>

On Mon, Nov 13, 2023 at 01:36:54PM +0000, Conor Dooley wrote:
> On Mon, Nov 13, 2023 at 08:55:00AM +0800, Jisheng Zhang wrote:
> > Add devicetree binding for Sophgo CV1800B SoC reset controller.
> > 
> > Signed-off-by: Jisheng Zhang <jszhang@kernel.org>
> 
> With the unterminated ifndef that was pointed out by the robots fixed,
> Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
> 
> > +/*				0-1	*/
> > +/*				10	*/
> > +/*				13	*/
> > +/*				15	*/
> > +/*				17	*/
> > +/*				36-39	*/
> > +/*				53-57	*/
> > +/*				59-60	*/
> > +/*				63-73	*/
> > +/*				90	*/
> > +/*				94	*/
> > +/*				102-292	*/
> 
> There are quite a lot of gaps here, do you know why that is?

The tail bits are for cpusys, so I guess the SoC designer want to
seperate them with guard? I'm not sure.

> 
> Thanks,
> Conor.