From: "Russell King (Oracle)" <linux@armlinux.org.uk>
To: Andrew Lunn <andrew@lunn.ch>
Cc: Jie Luo <quic_luoj@quicinc.com>,
davem@davemloft.net, edumazet@google.com, kuba@kernel.org,
pabeni@redhat.com, robh+dt@kernel.org,
krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org,
hkallweit1@gmail.com, corbet@lwn.net, netdev@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-doc@vger.kernel.org
Subject: Re: [PATCH v5 3/6] net: phy: at803x: add QCA8084 ethernet phy support
Date: Mon, 20 Nov 2023 16:18:07 +0000 [thread overview]
Message-ID: <ZVuGv2005eaw+R6u@shell.armlinux.org.uk> (raw)
In-Reply-To: <1d4d7761-6b42-48ec-af40-747cb4b84ca5@lunn.ch>
On Mon, Nov 20, 2023 at 04:34:55PM +0100, Andrew Lunn wrote:
> Are you saying there is a USXGMII-M level link change status? The link
> between the SoC and the PHY package is up/down? If it is down, all
> four MAC-PHY links are down. If it is up, it is possible to carry
> frames between the SoC and the PHY package, but maybe the PHYs
> themselves are down?
It shouldn't do. Each "channel" in the USXGMII-M link has its own
autoneg block at both ends, each conveys link status independently.
The MAC side structure is:
+----------+ +-----+
.-XGMII-> Rate | PCS | |
MAC1 <-MDI-> PHY <-+ | Adaption <--> Clause 49 <-> |
`-GMII--> | | |
+-----^----+ | |
| | |
+-----v---- + | |
| Autoneg | | |
| Clause 37 | | |
+-----------+ | |
| Mux <--> PMA <-->
| |
....... USXGMII-M
<------------------------------------------------------>
These blocks are repeated for each channel
The spec goes on to state that there must be a USXGMII enable bit that
defaults to disabled and the PHY should assume normal XGMII/XFI
operation. When enabled, autoneg follows a slight modification of
clause 37-6.
As far as the USXGMII-M link, I believe 2.7.8 in the USXGMII-M
documentation covers this, which is "hardware autoneg programming
sequence". It states that "if 10G link is lost or regained, the
software is expected to disable autoneg and re-enable autoneg". I
think "10G link" refers to the USXGMII-M connection, which means
the loss of that link shold cause software to intervene in each
of the PCS autoneg blocks. It is, however, rather unclear.
--
RMK's Patch system: https://www.armlinux.org.uk/developer/patches/
FTTP is here! 80Mbps down 10Mbps up. Decent connectivity at last!
next prev parent reply other threads:[~2023-11-20 16:18 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-11-18 6:27 [PATCH v5 0/6] add qca8084 ethernet phy driver Luo Jie
2023-11-18 6:27 ` [PATCH v5 1/6] net: phy: introduce core support for phy-mode = "10g-qxgmii" Luo Jie
2023-11-18 6:27 ` [PATCH v5 2/6] dt-bindings: net: ethernet-controller: add 10g-qxgmii mode Luo Jie
2023-11-18 6:27 ` [PATCH v5 3/6] net: phy: at803x: add QCA8084 ethernet phy support Luo Jie
2023-11-18 15:51 ` Andrew Lunn
2023-11-18 19:33 ` Russell King (Oracle)
2023-11-18 20:19 ` Andrew Lunn
2023-11-20 8:49 ` Jie Luo
2023-11-20 9:29 ` Russell King (Oracle)
2023-11-21 11:01 ` Jie Luo
2023-11-20 15:34 ` Andrew Lunn
2023-11-20 16:18 ` Russell King (Oracle) [this message]
2023-11-21 11:15 ` Jie Luo
2023-11-21 11:10 ` Jie Luo
2023-11-21 11:52 ` Russell King (Oracle)
2023-11-23 10:57 ` Jie Luo
2023-11-23 12:01 ` Russell King (Oracle)
2023-11-24 9:47 ` Jie Luo
2023-11-24 9:53 ` Russell King (Oracle)
2023-11-24 10:41 ` Jie Luo
2023-11-19 0:23 ` Jakub Kicinski
2023-11-20 8:55 ` Jie Luo
2023-11-18 6:27 ` [PATCH v5 4/6] net: phy: at803x: add the function phydev_id_is_qca808x Luo Jie
2023-11-19 0:22 ` Jakub Kicinski
2023-11-20 8:56 ` Jie Luo
2023-11-18 6:27 ` [PATCH v5 5/6] net: phy: at803x: Add qca8084_config_init function Luo Jie
2023-11-18 6:27 ` [PATCH v5 6/6] net: phy: qca8084: add qca8084_link_change_notify Luo Jie
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