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a=ed25519-sha256; c=relaxed/relaxed; t=1701162126; s=strato-dkim-0003; d=gerhold.net; h=In-Reply-To:References:Message-ID:Subject:Cc:To:From:Date:Cc:Date: From:Subject:Sender; bh=njnHQBlxJazLWcAbW1gqa8mgblbBdF2CRCqEZQfBIIw=; b=8/1mIY83/yDD+zTLGU3PquPNdvq5bT+5tGhBNu6pRU7uN+7Y0kocxGPDSnyY8/AxHp urFKBT2uGou13TLtIEBw== X-RZG-AUTH: ":P3gBZUipdd93FF5ZZvYFPugejmSTVR2nRPhVOQ/OcYgojyw4j34+u261EJF5OxJD4peA8paF1A==" Received: from gerhold.net by smtp.strato.de (RZmta 49.9.1 DYNA|AUTH) with ESMTPSA id t3efe7zAS925ktT (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256 bits)) (Client did not present a certificate); Tue, 28 Nov 2023 10:02:05 +0100 (CET) Date: Tue, 28 Nov 2023 10:01:47 +0100 From: Stephan Gerhold To: Neil Armstrong Cc: Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v4 2/8] arm64: dts: qcom: add initial SM8650 dtsi Message-ID: References: <20231124-topic-sm8650-upstream-dt-v4-0-e402e73cc5f0@linaro.org> <20231124-topic-sm8650-upstream-dt-v4-2-e402e73cc5f0@linaro.org> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20231124-topic-sm8650-upstream-dt-v4-2-e402e73cc5f0@linaro.org> Content-Transfer-Encoding: 7bit On Fri, Nov 24, 2023 at 10:20:39AM +0100, Neil Armstrong wrote: > Add initial DTSI for the Qualcomm SM8650 platform, > only contains nodes which doesn't depend on interconnect. > > Reviewed-by: Konrad Dybcio > Signed-off-by: Neil Armstrong > --- > arch/arm64/boot/dts/qcom/sm8650.dtsi | 2439 ++++++++++++++++++++++++++++++++++ > 1 file changed, 2439 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/sm8650.dtsi b/arch/arm64/boot/dts/qcom/sm8650.dtsi > new file mode 100644 > index 000000000000..b0a9ca53d58e > --- /dev/null > +++ b/arch/arm64/boot/dts/qcom/sm8650.dtsi > @@ -0,0 +1,2439 @@ > +[...] > + timer@17420000 { > + compatible = "arm,armv7-timer-mem"; > + reg = <0 0x17420000 0 0x1000>; > + > + ranges = <0 0 0 0x20000000>; > + #address-cells = <1>; > + #size-cells = <1>; > + > + frame@17421000 { > + reg = <0x17421000 0x1000>, > + <0x17422000 0x1000>; > + > + interrupts = , > + ; > + > + frame-number = <0>; > + }; > + > + frame@17423000 { > + reg = <0x17423000 0x1000>; > + > + interrupts = ; > + > + frame-number = <1>; > + > + status = "disabled"; > + }; > + > + frame@17425000 { > + reg = <0x17425000 0x1000>; > + > + interrupts = ; > + > + frame-number = <2>; > + > + status = "disabled"; > + }; > + > + frame@17427000 { > + reg = <0x17427000 0x1000>; > + > + interrupts = ; > + > + frame-number = <3>; > + > + status = "disabled"; > + }; > + > + frame@17429000 { > + reg = <0x17429000 0x1000>; > + > + interrupts = ; > + > + frame-number = <4>; > + > + status = "disabled"; > + }; > + > + frame@1742b000 { > + reg = <0x1742b000 0x1000>; > + > + interrupts = ; > + > + frame-number = <5>; > + > + status = "disabled"; > + }; > + > + frame@1742d000 { > + reg = <0x1742d000 0x1000>; > + > + interrupts = ; > + > + frame-number = <6>; > + > + status = "disabled"; > + }; > + }; Nitpick: Personally I feel the empty lines between each property here are a bit overly verbose. It would be better readable without them. Might be personal preference though :-) > +[...] > + timer { > + compatible = "arm,armv8-timer"; > + > + interrupts = , > + , > + , > + ; I'm pretty sure GIC_CPU_MASK_SIMPLE() is only valid & used on GICv2. Unlike arm,gic.yaml, arm,gic-v3.yaml doesn't mention "bits[15:8] PPI interrupt cpu mask". Also see e.g. commit 4a92b6d75bab ("arm64: dts: msm8996: Fix wrong use of GIC_CPU_MASK_SIMPLE()"). Would be also good to check if any existing DTs have introduced this incorrectly again since then. Thanks, Stephan