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[2003:e4:1f0f:a600:f22f:74ff:fe1f:3a53]) by smtp.gmail.com with ESMTPSA id n16-20020a05600c501000b00407b93d8085sm2743768wmr.27.2023.11.29.08.23.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 29 Nov 2023 08:23:16 -0800 (PST) Date: Wed, 29 Nov 2023 17:23:13 +0100 From: Thierry Reding To: Jason Gunthorpe Cc: David Airlie , Alyssa Rosenzweig , Albert Ou , asahi@lists.linux.dev, Catalin Marinas , Danilo Krummrich , Daniel Vetter , Dexuan Cui , devicetree@vger.kernel.org, dmaengine@vger.kernel.org, dri-devel@lists.freedesktop.org, David Woodhouse , Frank Rowand , Hanjun Guo , Haiyang Zhang , iommu@lists.linux.dev, Jon Hunter , Joerg Roedel , Karol Herbst , Krzysztof Kozlowski , "K. Y. Srinivasan" , Laxman Dewangan , Len Brown , linux-acpi@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-hyperv@vger.kernel.org, linux-mips@vger.kernel.org, linux-riscv@lists.infradead.org, linux-snps-arc@lists.infradead.org, linux-tegra@vger.kernel.org, Russell King , Lorenzo Pieralisi , Lyude Paul , Marek Szyprowski , nouveau@lists.freedesktop.org, Palmer Dabbelt , Paul Walmsley , "Rafael J. Wysocki" , Rob Herring , Robin Murphy , Sudeep Holla , Suravee Suthikulpanit , Sven Peter , Thomas Bogendoerfer , Vineet Gupta , Vinod Koul , Wei Liu , Will Deacon , Lu Baolu , Christoph Hellwig , Jerry Snitselaar , Hector Martin , Moritz Fischer , patches@lists.linux.dev, "Rafael J. Wysocki" , Rob Herring Subject: Re: [PATCH 08/10] iommu/tegra: Use tegra_dev_iommu_get_stream_id() in the remaining places Message-ID: References: <0-v1-720585788a7d+811b-iommu_fwspec_p1_jgg@nvidia.com> <8-v1-720585788a7d+811b-iommu_fwspec_p1_jgg@nvidia.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="OR6CuieIvqboqm08" Content-Disposition: inline In-Reply-To: <8-v1-720585788a7d+811b-iommu_fwspec_p1_jgg@nvidia.com> User-Agent: Mutt/2.2.12 (2023-09-09) --OR6CuieIvqboqm08 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Tue, Nov 28, 2023 at 08:48:04PM -0400, Jason Gunthorpe wrote: > This API was defined to formalize the access to internal iommu details on > some Tegra SOCs, but a few callers got missed. Add them. >=20 > The helper already masks by 0xFFFF so remove this code from the callers. >=20 > Suggested-by: Thierry Reding > Signed-off-by: Jason Gunthorpe > --- > drivers/dma/tegra186-gpc-dma.c | 8 +++----- > drivers/gpu/drm/nouveau/nvkm/subdev/ltc/gp10b.c | 7 ++----- > drivers/memory/tegra/tegra186.c | 12 ++++++------ > 3 files changed, 11 insertions(+), 16 deletions(-) >=20 > diff --git a/drivers/dma/tegra186-gpc-dma.c b/drivers/dma/tegra186-gpc-dm= a.c > index fa4d4142a68a21..88547a23825b18 100644 > --- a/drivers/dma/tegra186-gpc-dma.c > +++ b/drivers/dma/tegra186-gpc-dma.c > @@ -1348,8 +1348,8 @@ static int tegra_dma_program_sid(struct tegra_dma_c= hannel *tdc, int stream_id) > static int tegra_dma_probe(struct platform_device *pdev) > { > const struct tegra_dma_chip_data *cdata =3D NULL; > - struct iommu_fwspec *iommu_spec; > - unsigned int stream_id, i; > + unsigned int i; > + u32 stream_id; > struct tegra_dma *tdma; > int ret; > =20 > @@ -1378,12 +1378,10 @@ static int tegra_dma_probe(struct platform_device= *pdev) > =20 > tdma->dma_dev.dev =3D &pdev->dev; > =20 > - iommu_spec =3D dev_iommu_fwspec_get(&pdev->dev); > - if (!iommu_spec) { > + if (!tegra_dev_iommu_get_stream_id(&pdev->dev, &stream_id)) { > dev_err(&pdev->dev, "Missing iommu stream-id\n"); > return -EINVAL; > } > - stream_id =3D iommu_spec->ids[0] & 0xffff; > =20 > ret =3D device_property_read_u32(&pdev->dev, "dma-channel-mask", > &tdma->chan_mask); > diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/ltc/gp10b.c b/drivers/gp= u/drm/nouveau/nvkm/subdev/ltc/gp10b.c > index e7e8fdf3adab7a..b40fd1dbb21617 100644 > --- a/drivers/gpu/drm/nouveau/nvkm/subdev/ltc/gp10b.c > +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/ltc/gp10b.c > @@ -28,16 +28,13 @@ static void > gp10b_ltc_init(struct nvkm_ltc *ltc) > { > struct nvkm_device *device =3D ltc->subdev.device; > - struct iommu_fwspec *spec; > + u32 sid; > =20 > nvkm_wr32(device, 0x17e27c, ltc->ltc_nr); > nvkm_wr32(device, 0x17e000, ltc->ltc_nr); > nvkm_wr32(device, 0x100800, ltc->ltc_nr); > =20 > - spec =3D dev_iommu_fwspec_get(device->dev); > - if (spec) { > - u32 sid =3D spec->ids[0] & 0xffff; > - > + if (tegra_dev_iommu_get_stream_id(device->dev, &sid)) { > /* stream ID */ > nvkm_wr32(device, 0x160000, sid << 2); We could probably also remove the comment now since the function and variable names make it obvious what's being written here. > } > diff --git a/drivers/memory/tegra/tegra186.c b/drivers/memory/tegra/tegra= 186.c > index 533f85a4b2bdb7..3e4fbe94dd666e 100644 > --- a/drivers/memory/tegra/tegra186.c > +++ b/drivers/memory/tegra/tegra186.c > @@ -111,21 +111,21 @@ static void tegra186_mc_client_sid_override(struct = tegra_mc *mc, > static int tegra186_mc_probe_device(struct tegra_mc *mc, struct device *= dev) > { > #if IS_ENABLED(CONFIG_IOMMU_API) > - struct iommu_fwspec *fwspec =3D dev_iommu_fwspec_get(dev); > struct of_phandle_args args; > unsigned int i, index =3D 0; > + u32 sid; > =20 > + WARN_ON(!tegra_dev_iommu_get_stream_id(dev, &sid)); I know the code previously didn't check for any errors, but we may want to do so now. If tegra_dev_iommu_get_stream_id() ever fails we may end up writing some undefined value into the override register. I'm also unsure if WARN_ON() is appropriate here. I vaguely recall that ->probe_device() was called for all devices on the bus and not all of them may have been associated with the IOMMU. Not all of them may in fact access memory in the first place. Perhaps I'm misremembering and the IOMMU core now takes care of only calling this when fwspec is indeed valid? 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