From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id F196040BFC; Thu, 7 Dec 2023 15:27:49 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="TgL9KtdY" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 5D5FDC433C7; Thu, 7 Dec 2023 15:27:49 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1701962869; bh=WuHw8xBDQ4YPG0E788n4gpBGlBKTZtk7wXdWqhrweF4=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=TgL9KtdYlG4PFBVAkV/sg39gPBkBc1aKidxwfqYRrzk2ZA4RHPcOPy0HGyeZso8Z9 bhTJU6U4hfQspY18LbEMb55CsfoESrH1Tg1OqsgRGFNMxO62AlQRTGZZXNuSo/sbAK wgoumdqFMPTxtnbfsBKet6cgEgWu/Lh16lt5PMi/wfTyaBqDvOuW3KJ0chfmEWDSo9 bpe9/6+b75Tzpp6pHxxT1hlnHTVzvXVXlked6bsW6oetQnPGFgjpBZHaxXuGle+8h4 RgooKFeqnIWvdCRijDdkC3u+hFpn747kWtx/08ovW73iluc+N74sD1qPEZv1+Jvbnq h5hls87q6xxfQ== Received: from johan by xi.lan with local (Exim 4.96.2) (envelope-from ) id 1rBGIp-0000q6-1V; Thu, 07 Dec 2023 16:28:39 +0100 Date: Thu, 7 Dec 2023 16:28:39 +0100 From: Johan Hovold To: Krishna Kurapati Cc: Thinh Nguyen , Greg Kroah-Hartman , Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Wesley Cheng , Conor Dooley , cros-qcom-dts-watchers@chromium.org, linux-usb@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, quic_ppratap@quicinc.com, quic_jackp@quicinc.com Subject: Re: [PATCH v2 2/6] usb: dwc3: qcom: Rename hs_phy_irq to qusb2_phy_irq Message-ID: References: <20231204100950.28712-1-quic_kriskura@quicinc.com> <20231204100950.28712-3-quic_kriskura@quicinc.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20231204100950.28712-3-quic_kriskura@quicinc.com> On Mon, Dec 04, 2023 at 03:39:46PM +0530, Krishna Kurapati wrote: > For wakeup to work, driver needs to enable interrupts that depict what is > happening on th DP/DM lines. On QUSB targets, this is identified by typo: the > qusb2_phy whereas on SoCs using Femto PHY, separate {dp,dm}_hs_phy_irq's > are used instead. > > The implementation incorrectly names qusb2_phy interrupts as "hs_phy_irq". > Clean this up so that driver would be using only qusb2/(dp & dm) for wakeup > purposes. Here too you should say something about why this won't break any systems booting using an older devicetree. Specifically, the QUSB2 PHY interrupt has never been armed on any system running mainline as those bits never made it upstream. So an alternative to this could also be to just drop the QUSB2 PHY interrupt handling from this driver for now. Johan