From: Andy Shevchenko <andy@kernel.org>
To: "TY_Chang[張子逸]" <tychang@realtek.com>,
"Michael Walle" <michael@walle.cc>
Cc: Linus Walleij <linus.walleij@linaro.org>,
Bartosz Golaszewski <brgl@bgdev.pl>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Conor Dooley <conor+dt@kernel.org>,
"linux-gpio@vger.kernel.org" <linux-gpio@vger.kernel.org>,
"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v3 2/2] Add GPIO support for Realtek DHC(Digital Home Center) RTD SoCs.
Date: Thu, 14 Dec 2023 15:58:27 +0200 [thread overview]
Message-ID: <ZXsKAyIlY3y3tgUi@smile.fi.intel.com> (raw)
In-Reply-To: <23574204547646779d02f0109c20b3ff@realtek.com>
+Cc: Michael (GPIO regmap maintainer)
On Thu, Dec 14, 2023 at 07:57:55AM +0000, TY_Chang[張子逸] wrote:
> >On Tue, Dec 12, 2023 at 09:55:59AM +0000, TY_Chang[張子逸] wrote:
> >> >On Thu, Dec 07, 2023 at 06:07:23PM +0800, TY Chang wrote:
...
> >> >> This driver enables configuration of GPIO direction, GPIO values,
> >> >> GPIO debounce settings and handles GPIO interrupts.
> >> >
> >> >Why gpio-regmap can't be used?
> >>
> >> I will try to use gpio-remap in the next version.
> >
> >If it appears that it makes code uglier / complicated, please add the note
> >somewhere to answer the above question.
>
> I've traced the gpio-regmap.c file. It appears that for the driver to register
> gpio_irq_chip, it must create the irq_domain and add it into gpio_regmap_config.
> Additionally, the driver needs to register the irq handler by itself.
> However, this process can be managed by the gpiolib if the driver fills in the struct
> gpio_irq_chip inside struct gpio_chip before invoking gpiochip_add_data.
Hmm... I thought this is solvable issue.
Michael, is there a limitation in GPIO regmap that this driver can't be converted?
> Moreover, apart from managing the registers for gpio direction and value, there
> are several other registers that require access(interrupt enable, debounce...).
> The GPIO IRQ status registers are located at different base addresses and are
> not contiguous. It may need to create an additional regmap and assign the access
> table to this regmap.
AFAIK this is not a problem as you can provide your own xlate function that
will take care about register mapping.
> With the above consideration, I tend to keep using the existing method.
I would like to hear from Michael if it's indeed a big obstacle.
...
> >> >> + if (irq == data->irqs[0])
> >> >> + get_reg_offset = &rtd_gpio_gpa_offset;
> >> >> + else if (irq == data->irqs[1])
> >> >> + get_reg_offset = &rtd_gpio_gpda_offset;
> >> >
> >> >Can't it be done before entering into chained IRQ handler?
> >>
> >> I will revise it.
> >
> >Thinking about this more, perhaps you can register two IRQ chips with
> >different functions, so this won't be part of the very critical interrupt
> >handler (as we all want to reduce overhead in it as much as possible).
> >Anyway, think about this and try different options, choose the one you think
> >the best.
>
> In the previous patch (v1), I had registered two IRQ chips with different
> handlers. However, these two handlers appeared quite similar and the
> gpio_irq_chip only allows the registration of a single handler. Therefore,
> I ended up registering one handler for both IRQs and included conditional
> checks within the handler to differentiate between the two.
What is the performance impact that you have that condition in the interrupt
handler?
--
With Best Regards,
Andy Shevchenko
next prev parent reply other threads:[~2023-12-14 13:58 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-12-07 10:07 [PATCH v3 0/2] Add gpio driver support for Realtek DHC SoCs TY Chang
2023-12-07 10:07 ` [PATCH v3 1/2] dt-bindings: gpio: realtek: Add realtek,rtd-gpio TY Chang
2023-12-07 13:54 ` Krzysztof Kozlowski
2023-12-08 9:03 ` TY_Chang[張子逸]
2023-12-08 12:19 ` Krzysztof Kozlowski
2023-12-07 10:07 ` [PATCH v3 2/2] Add GPIO support for Realtek DHC(Digital Home Center) RTD SoCs TY Chang
2023-12-07 13:45 ` Andy Shevchenko
2023-12-12 9:55 ` TY_Chang[張子逸]
2023-12-13 13:40 ` Andy Shevchenko
2023-12-14 7:57 ` TY_Chang[張子逸]
2023-12-14 13:58 ` Andy Shevchenko [this message]
2023-12-14 14:35 ` Michael Walle
2023-12-14 14:49 ` Andy Shevchenko
2023-12-15 6:50 ` TY_Chang[張子逸]
2023-12-18 8:50 ` Michael Walle
[not found] ` <202312181420.3BIEK9gtC1692907@rtits1.realtek.com.tw>
2023-12-20 7:13 ` TY_Chang[張子逸]
2023-12-15 3:29 ` TY_Chang[張子逸]
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